{"id":"https://openalex.org/W2492437542","doi":"https://doi.org/10.1007/978-3-322-86541-0_4","title":"Einheitliche Modellierung mit VHDL-A","display_name":"Einheitliche Modellierung mit VHDL-A","publication_year":1996,"publication_date":"1996-01-01","ids":{"openalex":"https://openalex.org/W2492437542","doi":"https://doi.org/10.1007/978-3-322-86541-0_4","mag":"2492437542"},"language":"de","primary_location":{"id":"doi:10.1007/978-3-322-86541-0_4","doi":"https://doi.org/10.1007/978-3-322-86541-0_4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-322-86541-0_4","pdf_url":null,"source":{"id":"https://openalex.org/S4306464255","display_name":"Vieweg+Teubner eBooks","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"ebook platform"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Simulationstechnik","raw_type":"book-chapter"},"volume":{"id":"https://openalex.org/W4243429803","display_name":"Simulationstechnik"},"type":"book-chapter","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027922659","display_name":"Eduard Moser","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I889804353","display_name":"Robert Bosch (Germany)","ror":"https://ror.org/01fe0jt45","country_code":"DE","type":"company","lineage":["https://openalex.org/I889804353"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Eduard Moser","raw_affiliation_strings":["Corporate Research and Development, Robert Bosch GmbH, Postfach 10 60 50, 70049, Stuttgart, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Corporate Research and Development, Robert Bosch GmbH, Postfach 10 60 50, 70049, Stuttgart, Germany","institution_ids":["https://openalex.org/I889804353"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079446871","display_name":"Reinhard Neul","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I889804353","display_name":"Robert Bosch (Germany)","ror":"https://ror.org/01fe0jt45","country_code":"DE","type":"company","lineage":["https://openalex.org/I889804353"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Reinhard Neul","raw_affiliation_strings":["Corporate Research and Development, Robert Bosch GmbH, Postfach 10 60 50, 70049, Stuttgart, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Corporate Research and Development, Robert Bosch GmbH, Postfach 10 60 50, 70049, Stuttgart, Germany","institution_ids":["https://openalex.org/I889804353"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I889804353"],"apc_list":null,"apc_paid":null,"fwci":1.055,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.81094527,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"21","last_page":"28"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6137999892234802,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6137999892234802,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13286","display_name":"Modeling and Simulation Systems","score":0.21240000426769257,"subfield":{"id":"https://openalex.org/subfields/2611","display_name":"Modeling and Simulation"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11450","display_name":"Model-Driven Software Engineering Techniques","score":0.06319999694824219,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/analogue-modelling","display_name":"analogue modelling","score":0.5529999732971191},{"id":"https://openalex.org/keywords/unified-modeling","display_name":"unified modeling","score":0.5649999976158142},{"id":"https://openalex.org/keywords/analog-circuit-simulation","display_name":"analog circuit simulation","score":0.5730000138282776},{"id":"https://openalex.org/keywords/control-system-design","display_name":"control system design","score":0.8040000200271606},{"id":"https://openalex.org/keywords/regulation-systems","display_name":"regulation systems","score":0.7070000171661377},{"id":"https://openalex.org/keywords/hardware-description-languages","display_name":"hardware description languages","score":0.6549999713897705}],"concepts":[{"id":"https://openalex.org/C15708023","wikidata":"https://www.wikidata.org/wiki/Q80083","display_name":"Humanities","level":1,"score":0.5238792300224304},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.4997134208679199},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.458727091550827},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3949771523475647},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.07702234387397766},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-322-86541-0_4","doi":"https://doi.org/10.1007/978-3-322-86541-0_4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-322-86541-0_4","pdf_url":null,"source":{"id":"https://openalex.org/S4306464255","display_name":"Vieweg+Teubner eBooks","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"ebook platform"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Simulationstechnik","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W1481625184"],"related_works":["https://openalex.org/W2502141657","https://openalex.org/W1977836779","https://openalex.org/W1763139770","https://openalex.org/W163199505","https://openalex.org/W7098143009","https://openalex.org/W7098977885","https://openalex.org/W4210891495","https://openalex.org/W1514903510","https://openalex.org/W4236013290","https://openalex.org/W92848442"],"abstract_inverted_index":{"Der":[0],"Bedarf":[1],"einer":[2],"einheitlichen":[3],"Modellierung":[4],"ist":[5],"bereits":[6],"hinl\u00e4nglich":[7],"aufgezeigt":[8],"worden.":[9],"Mit":[10],"IEEE":[11],"PAR":[12],"1076.1,":[13],"der":[14,40],"analogen":[15],"Erweiterung":[16],"zu":[17,23,33],"VHDL,":[18],"erscheint":[19],"diese":[20],"Aufgabe":[21],"l\u00f6sbar":[22],"sein":[24],"und":[25,31,49],"eine":[26],"geeignetet":[27],"Basis":[28],"f\u00fcr":[29],"Anwender":[30],"Werkzeugmacher":[32],"liefern.":[34],"Dies":[35],"Papier":[36],"diskutiert":[37],"die":[38],"Konzepte":[39],"Sprache":[41],"in":[42],"Hinblick":[43],"auf":[44],"den":[45],"Entwurf":[46],"von":[47],"Steuerungs-":[48],"Regelungssystemen.":[50]},"counts_by_year":[],"updated_date":"2026-10-10T09:11:00.788812","created_date":"2016-08-23T00:00:00"}
