{"id":"https://openalex.org/W2467013340","doi":"https://doi.org/10.1088/1674-4926/37/6/065005","title":"An S/H circuit with parasitics optimized for IF-sampling","display_name":"An S/H circuit with parasitics optimized for IF-sampling","publication_year":2016,"publication_date":"2016-06-01","ids":{"openalex":"https://openalex.org/W2467013340","doi":"https://doi.org/10.1088/1674-4926/37/6/065005","mag":"2467013340"},"language":"en","primary_location":{"id":"doi:10.1088/1674-4926/37/6/065005","doi":"https://doi.org/10.1088/1674-4926/37/6/065005","is_oa":false,"landing_page_url":"https://doi.org/10.1088/1674-4926/37/6/065005","pdf_url":null,"source":{"id":"https://openalex.org/S52834336","display_name":"Journal of Semiconductors","issn_l":"1674-4926","issn":["1674-4926","2058-6140"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310320083","host_organization_name":"IOP Publishing","host_organization_lineage":["https://openalex.org/P4310320083","https://openalex.org/P4310311669"],"host_organization_lineage_names":["IOP Publishing","Institute of Physics"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Semiconductors","raw_type":"journal-article"},"parent_works":[],"lineage":["https://openalex.org/W2467013340"],"child_works_count":0,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://figshare.com/articles/journal_contribution/An_S_H_circuit_with_parasitics_optimized_for_IF-sampling/24364858","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002581130","display_name":"Xuqiang Zheng","orcid":"https://orcid.org/0000-0002-8978-6825","observed_orcids":["https://orcid.org/0000-0002-8978-6825"]},"institutions":[{"id":"https://openalex.org/I51532219","display_name":"University of Lincoln","ror":"https://ror.org/03yeq9x20","country_code":"GB","type":"education","lineage":["https://openalex.org/I51532219"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN","GB"],"is_corresponding":false,"raw_author_name":"Zheng Xuqiang","raw_affiliation_strings":["School of Computer Science, University of Lincoln, Lincoln, UK","Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science, University of Lincoln, Lincoln, UK","institution_ids":["https://openalex.org/I51532219"]},{"raw_affiliation_string":"Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084959547","display_name":"Fule Li","orcid":"https://orcid.org/0000-0002-7341-7240","observed_orcids":["https://orcid.org/0000-0002-7341-7240","https://orcid.org/0009-0000-8957-2344"]},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Li Fule","raw_affiliation_strings":["Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100437342","display_name":"Zhijun Wang","orcid":"https://orcid.org/0000-0001-7403-7170","observed_orcids":["https://orcid.org/0000-0001-7403-7170"]},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wang Zhijun","raw_affiliation_strings":["Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100646157","display_name":"Weitao Li","orcid":"https://orcid.org/0000-0001-7855-428X","observed_orcids":["https://orcid.org/0000-0001-7855-428X"]},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Li Weitao","raw_affiliation_strings":["Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101189239","display_name":"Jia Wen","orcid":"https://orcid.org/0009-0000-4701-4352","observed_orcids":["https://orcid.org/0009-0000-4701-4352"]},"institutions":[{"id":"https://openalex.org/I4405261323","display_name":"Research Institute of Tsinghua University in Shenzhen","ror":"https://ror.org/0543pw950","country_code":"CN","type":"education","lineage":["https://openalex.org/I4405261323"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jia Wen","raw_affiliation_strings":["Research Institute of Tsinghua University in Shenzhen, Shenzhen 518055, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Research Institute of Tsinghua University in Shenzhen, Shenzhen 518055, China","institution_ids":["https://openalex.org/I4405261323"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Wang Zhihua","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wang Zhihua","raw_affiliation_strings":["Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059786971","display_name":"Shigang Yue","orcid":"https://orcid.org/0000-0002-1899-6307","observed_orcids":["https://orcid.org/0000-0002-1899-6307"]},"institutions":[{"id":"https://openalex.org/I51532219","display_name":"University of Lincoln","ror":"https://ror.org/03yeq9x20","country_code":"GB","type":"education","lineage":["https://openalex.org/I51532219"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Yue Shigang","raw_affiliation_strings":["School of Computer Science, University of Lincoln, Lincoln, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science, University of Lincoln, Lincoln, UK","institution_ids":["https://openalex.org/I51532219"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5084959547","https://openalex.org/A5100646157"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":{"value":2450,"currency":"USD","value_usd":2450},"apc_paid":null,"fwci":0.1308,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.49723772,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":"37","issue":"6","first_page":"065005","last_page":"065005"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.001500000013038516,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sample-and-hold-circuit","display_name":"sample-and-hold circuit","score":0.9350000023841858},{"id":"https://openalex.org/keywords/intermediate-frequency-sampling","display_name":"intermediate frequency sampling","score":0.8149999976158142},{"id":"https://openalex.org/keywords/bootstrapped-switch","display_name":"bootstrapped switch","score":0.878000020980835},{"id":"https://openalex.org/keywords/layout-optimization","display_name":"layout optimization","score":0.699999988079071},{"id":"https://openalex.org/keywords/pipelined-adc","display_name":"pipelined ADC","score":0.656000018119812},{"id":"https://openalex.org/keywords/front-end-circuit","display_name":"front-end circuit","score":0.5490000247955322}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.887251615524292},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6124269366264343},{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.597206711769104},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5941872596740723},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.5533831715583801},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5107872486114502},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.507028341293335},{"id":"https://openalex.org/C154318817","wikidata":"https://www.wikidata.org/wiki/Q2157249","display_name":"Parasitic capacitance","level":4,"score":0.46071726083755493},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4518241584300995},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.4186837077140808},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.40142586827278137},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3973977267742157},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.20902547240257263},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.12478762865066528},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1088/1674-4926/37/6/065005","doi":"https://doi.org/10.1088/1674-4926/37/6/065005","is_oa":false,"landing_page_url":"https://doi.org/10.1088/1674-4926/37/6/065005","pdf_url":null,"source":{"id":"https://openalex.org/S52834336","display_name":"Journal of Semiconductors","issn_l":"1674-4926","issn":["1674-4926","2058-6140"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310320083","host_organization_name":"IOP Publishing","host_organization_lineage":["https://openalex.org/P4310320083","https://openalex.org/P4310311669"],"host_organization_lineage_names":["IOP Publishing","Institute of Physics"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Semiconductors","raw_type":"journal-article"},{"id":"pmh:oai:figshare.com:article/24364858","doi":null,"is_oa":true,"landing_page_url":"https://figshare.com/articles/journal_contribution/An_S_H_circuit_with_parasitics_optimized_for_IF-sampling/24364858","pdf_url":null,"source":{"id":"https://openalex.org/S4377196282","display_name":"Figshare","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I4210132348","host_organization_name":"Figshare (United Kingdom)","host_organization_lineage":["https://openalex.org/I4210132348"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Text"},{"id":"mag:2519284667","doi":null,"is_oa":false,"landing_page_url":"http://www.cqvip.com/QK/94689X/201606/669377445.html","pdf_url":null,"source":{"id":"https://openalex.org/S4306544928","display_name":"\u534a\u5bfc\u4f53\u5b66\u62a5\uff1a\u82f1\u6587\u7248","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"\u534a\u5bfc\u4f53\u5b66\u62a5\uff1a\u82f1\u6587\u7248","raw_type":null}],"best_oa_location":{"id":"pmh:oai:figshare.com:article/24364858","doi":null,"is_oa":true,"landing_page_url":"https://figshare.com/articles/journal_contribution/An_S_H_circuit_with_parasitics_optimized_for_IF-sampling/24364858","pdf_url":null,"source":{"id":"https://openalex.org/S4377196282","display_name":"Figshare","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I4210132348","host_organization_name":"Figshare (United Kingdom)","host_organization_lineage":["https://openalex.org/I4210132348"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Text"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1941414088","https://openalex.org/W1965396834","https://openalex.org/W1969449201","https://openalex.org/W1981808973","https://openalex.org/W2009064736","https://openalex.org/W2044250819","https://openalex.org/W2099745999","https://openalex.org/W2101004723","https://openalex.org/W2111708953","https://openalex.org/W2113863536","https://openalex.org/W2312982817","https://openalex.org/W2329625303","https://openalex.org/W2531538914","https://openalex.org/W4238715113"],"related_works":["https://openalex.org/W1500907835","https://openalex.org/W2349671978","https://openalex.org/W2460868514","https://openalex.org/W2894809507","https://openalex.org/W2045700297","https://openalex.org/W1946503041","https://openalex.org/W2160720944","https://openalex.org/W2084422388","https://openalex.org/W1542022561","https://openalex.org/W1993173330"],"abstract_inverted_index":{"An":[0],"IF-sampling":[1],"S/H":[2,60,126],"is":[3,33,90,119],"presented,":[4],"which":[5,94,118],"adopts":[6],"a":[7,24,73],"flip-around":[8],"structure,":[9],"bottom-plate":[10],"sampling":[11,21],"technique":[12,32],"and":[13,46,54],"improved":[14],"input":[15,26,38,102,116],"bootstrapped":[16],"switches.":[17,39],"To":[18],"achieve":[19],"high":[20,115],"linearity":[22],"over":[23,97],"wide":[25],"frequency":[27,103],"range,":[28],"the":[29,37,56,70,84,88,123],"floating":[30],"well":[31],"utilized":[34],"to":[35,51,105,122],"optimize":[36],"Besides,":[40],"techniques":[41],"of":[42,72,87],"transistor":[43],"load":[44],"linearization":[45],"layout":[47],"improvement":[48],"are":[49],"proposed":[50],"further":[52],"reduce":[53],"linearize":[55],"parasitic":[57],"capacitance.":[58],"The":[59,108],"circuit":[61],"has":[62],"been":[63],"fabricated":[64],"in":[65],"0.18-\u03bcm":[66],"CMOS":[67],"process":[68],"as":[69],"front-end":[71],"14":[74],"bit,":[75],"250":[76],"MS/s":[77],"pipeline":[78],"ADC.":[79],"For":[80],"30":[81],"MHz":[82],"input,":[83],"measured":[85],"SFDR/SNDR":[86],"ADC":[89,109],"94.7":[91],"dB/68.":[92],"5dB,":[93],"can":[95],"remain":[96],"84.3":[98],"dB/65.4":[99],"dB":[100],"for":[101],"up":[104],"400":[106],"MHz.":[107],"presents":[110],"excellent":[111],"dynamic":[112],"performance":[113],"at":[114],"frequency,":[117],"mainly":[120],"attributed":[121],"parasitics":[124],"optimized":[125],"circuit.":[127]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-07-22T00:00:00"}