{"id":"https://openalex.org/W24257822","doi":null,"title":"Optimized DES Core Implementation for Commercial FPGA Cluster System","display_name":"Optimized DES Core Implementation for Commercial FPGA Cluster System","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W24257822","mag":"24257822"},"language":"en","primary_location":{"id":"mag:1908878282","doi":null,"is_oa":false,"landing_page_url":"http://dspace.kci.go.kr/handle/kci/1589471","pdf_url":null,"source":{"id":"https://openalex.org/S4306496444","display_name":"\uc815\ubcf4\ubcf4\ud638\ud559\ud68c\ub17c\ubb38\uc9c0","issn_l":"1598-3986","issn":["1598-3986","2288-2715"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["kci-registered"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"\uc815\ubcf4\ubcf4\ud638\ud559\ud68c\ub17c\ubb38\uc9c0","raw_type":null},"volume":null,"type":"article","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058442241","display_name":"Eun-Gu Jung","orcid":"https://orcid.org/0000-0002-8295-5235","observed_orcids":["https://orcid.org/0000-0002-8295-5235"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"\uc815\uc740\uad6c","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5052676072","display_name":"Il-Hwan Park","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"\ubc15\uc77c\ud658","raw_affiliation_strings":["Electronics and Telecommunications Research Institute, Daejeon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Telecommunications Research Institute, Daejeon, South Korea","institution_ids":["https://openalex.org/I142401562"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.002512,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"21","issue":"2","first_page":"131","last_page":"138"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.0032999999821186066,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.0012000000569969416,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/des","display_name":"DES","score":0.6909999847412109},{"id":"https://openalex.org/keywords/fpga-clusters","display_name":"FPGA clusters","score":0.5299999713897705},{"id":"https://openalex.org/keywords/pipeline-stages","display_name":"pipeline stages","score":0.656000018119812},{"id":"https://openalex.org/keywords/low-power-design","display_name":"low power design","score":0.7990000247955322},{"id":"https://openalex.org/keywords/xilinx-virtex-5","display_name":"Xilinx Virtex-5","score":0.8180000185966492},{"id":"https://openalex.org/keywords/fpga-resource-utilization","display_name":"FPGA resource utilization","score":0.4729999899864197}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.9297525882720947},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6694568395614624},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6551815271377563},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5625585913658142},{"id":"https://openalex.org/C164866538","wikidata":"https://www.wikidata.org/wiki/Q367351","display_name":"Cluster (spacecraft)","level":2,"score":0.47548162937164307},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4504930078983307},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4452981948852539},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34091663360595703},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.30187392234802246},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1427774727344513}],"mesh":[],"locations_count":2,"locations":[{"id":"mag:1908878282","doi":null,"is_oa":false,"landing_page_url":"http://dspace.kci.go.kr/handle/kci/1589471","pdf_url":null,"source":{"id":"https://openalex.org/S4306496444","display_name":"\uc815\ubcf4\ubcf4\ud638\ud559\ud68c\ub17c\ubb38\uc9c0","issn_l":"1598-3986","issn":["1598-3986","2288-2715"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["kci-registered"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"\uc815\ubcf4\ubcf4\ud638\ud559\ud68c\ub17c\ubb38\uc9c0","raw_type":null},{"id":"mag:24257822","doi":null,"is_oa":false,"landing_page_url":"https://koreascience.or.kr:443/article/JAKO201110334670126.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306418898","display_name":"Information Security and Cryptology","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"Information Security and Cryptology","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4943999946117401,"id":"https://metadata.un.org/sdg/9"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1592063330","https://openalex.org/W1606892637","https://openalex.org/W1784406605","https://openalex.org/W1991374982","https://openalex.org/W2004875997","https://openalex.org/W2028744416","https://openalex.org/W2051632117","https://openalex.org/W2126856211","https://openalex.org/W2144007792","https://openalex.org/W3204802657"],"related_works":["https://openalex.org/W1908878282","https://openalex.org/W2391997288","https://openalex.org/W2356320136","https://openalex.org/W2091670284","https://openalex.org/W2042166733","https://openalex.org/W7100153764","https://openalex.org/W1600955406","https://openalex.org/W2389243593","https://openalex.org/W2021040705","https://openalex.org/W2156490070"],"abstract_inverted_index":{"The":[0],"previous":[1],"FPGA":[2,31,45,49,118,139],"cluster":[3,50,140],"systems":[4],"for":[5,42],"a":[6,29,43,69,83],"brute":[7],"force":[8],"search":[9],"of":[10,24,46,65,74,82,108,113],"DES":[11,26,40,70,75,84,93,124,132,147],"keyspace":[12],"have":[13],"showed":[14],"cost":[15],"efficient":[16],"performance,":[17],"but":[18],"the":[19,25,38,47,63,72,78,106,130,138,146],"research":[20],"on":[21,28,116],"optimized":[22,39],"implementation":[23,41],"algorithm":[27],"single":[30,44],"has":[32],"been":[33],"insufficient.":[34],"In":[35],"this":[36],"paper,":[37],"commercial":[48],"system":[51],"with":[52],"77":[53],"Xilinx":[54],"Virtex5-LX50":[55],"FPGAs":[56],"is":[57,86,102,143],"proposed.":[58],"Design":[59],"space":[60],"exploration":[61],"using":[62],"number":[64,73],"pipeline":[66],"stages":[67],"in":[68,121,137],"core,":[71],"cores":[76,94,125],"and":[77,156],"maximum":[79],"clock":[80],"frequency":[81],"core":[85],"performed":[87],"which":[88,119],"leads":[89],"to":[90,104],"integrating":[91],"16":[92],"running":[95,126],"at":[96,127,152],"333MHz.":[97,128],"Also":[98],"low":[99],"power":[100,114],"design":[101],"applied":[103],"reduce":[105],"loss":[107],"performance":[109],"caused":[110],"by":[111],"limitation":[112],"supply":[115],"each":[117],"results":[120],"fitting":[122],"8":[123],"When":[129],"proposed":[131],"implementations":[133],"would":[134,149],"be":[135,150],"used":[136],"system,":[141],"it":[142],"estimated":[144],"that":[145],"key":[148],"found":[151],"most":[153],"2.03":[154],"days":[155,158],"4.06":[157],"respectively.":[159]},"counts_by_year":[],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-06-24T00:00:00"}
