{"id":"https://openalex.org/W2394873111","doi":null,"title":"A design and implementation of Face Detection hardware","display_name":"A design and implementation of Face Detection hardware","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2394873111","mag":"2394873111"},"language":"en","primary_location":{"id":"mag:2394873111","doi":null,"is_oa":false,"landing_page_url":"http://www.koreascience.or.kr/article/ArticleFullRecord.jsp?cn=DHJJLN_2007_v44n4_43","pdf_url":null,"source":{"id":"https://openalex.org/S2764675581","display_name":"Journal of the Institute of Electronics Engineers of Korea","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"Journal of the Institute of Electronics Engineers of Korea","raw_type":null},"volume":null,"type":"article","indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100631908","display_name":"Su-Hyun Lee","orcid":"https://orcid.org/0000-0002-0501-794X","observed_orcids":["https://orcid.org/0000-0002-0501-794X"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Su-Hyun Lee","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5102954248","display_name":"Yong-Jin Jeong","orcid":"https://orcid.org/0000-0002-6107-5220","observed_orcids":["https://orcid.org/0000-0002-6107-5220"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yong-Jin Jeong","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3153,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.71459473,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"44","issue":"4","first_page":"43","last_page":"54"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.875,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.875,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.04309999942779541,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11448","display_name":"Face recognition and analysis","score":0.026499999687075615,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fpga-implementation","display_name":"FPGA implementation","score":0.7919999957084656},{"id":"https://openalex.org/keywords/real-time-face-detection","display_name":"real-time face detection","score":0.7649999856948853},{"id":"https://openalex.org/keywords/integral-image","display_name":"integral image","score":0.8349999785423279},{"id":"https://openalex.org/keywords/haar-cascade-classifier","display_name":"Haar cascade classifier","score":0.7149999737739563},{"id":"https://openalex.org/keywords/sliding-window-detection","display_name":"sliding window detection","score":0.8569999933242798},{"id":"https://openalex.org/keywords/embedded-systems","display_name":"embedded systems","score":0.6019999980926514},{"id":"https://openalex.org/keywords/asic-design","display_name":"ASIC design","score":0.6790000200271606},{"id":"https://openalex.org/keywords/fpga-synthesis","display_name":"FPGA synthesis","score":0.382999986410141},{"id":"https://openalex.org/keywords/ccd-detector","display_name":"CCD detector","score":0.4320000112056732}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8248631954193115},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7810689806938171},{"id":"https://openalex.org/C2776836400","wikidata":"https://www.wikidata.org/wiki/Q31087","display_name":"Calculator","level":2,"score":0.7771940231323242},{"id":"https://openalex.org/C4641261","wikidata":"https://www.wikidata.org/wiki/Q11681085","display_name":"Face detection","level":4,"score":0.688850998878479},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6231412887573242},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.597711980342865},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.5915451049804688},{"id":"https://openalex.org/C2779304628","wikidata":"https://www.wikidata.org/wiki/Q3503480","display_name":"Face (sociological concept)","level":2,"score":0.579906702041626},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5108098983764648},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.4666908383369446},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4283265769481659},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.34151580929756165},{"id":"https://openalex.org/C31510193","wikidata":"https://www.wikidata.org/wiki/Q1192553","display_name":"Facial recognition system","level":3,"score":0.3158140778541565},{"id":"https://openalex.org/C52622490","wikidata":"https://www.wikidata.org/wiki/Q1026626","display_name":"Feature extraction","level":2,"score":0.26602625846862793},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C144024400","wikidata":"https://www.wikidata.org/wiki/Q21201","display_name":"Sociology","level":0,"score":0.0},{"id":"https://openalex.org/C36289849","wikidata":"https://www.wikidata.org/wiki/Q34749","display_name":"Social science","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"mag:2394873111","doi":null,"is_oa":false,"landing_page_url":"http://www.koreascience.or.kr/article/ArticleFullRecord.jsp?cn=DHJJLN_2007_v44n4_43","pdf_url":null,"source":{"id":"https://openalex.org/S2764675581","display_name":"Journal of the Institute of Electronics Engineers of Korea","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"Journal of the Institute of Electronics Engineers of Korea","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2154053734","https://openalex.org/W2078392838","https://openalex.org/W2547138538","https://openalex.org/W2094668108","https://openalex.org/W2349342214","https://openalex.org/W2247734370","https://openalex.org/W2093215079","https://openalex.org/W1969793556","https://openalex.org/W4411736267","https://openalex.org/W2087117564"],"abstract_inverted_index":{"This":[0,142],"paper":[1],"presents":[2],"design":[3,85],"and":[4,48,58,79,92,132,144,171],"verification":[5],"of":[6,33,72,77,89,168],"a":[7,80,162,166],"face":[8,20,63,98,139],"detection":[9,16,64,99],"hardware":[10,30,65],"for":[11,97,107,138,153],"real":[12,163],"time":[13],"application.":[14],"Face":[15],"algorithm":[17],"detects":[18],"rough":[19],"position":[21],"based":[22],"on":[23,101,112],"already":[24],"acquired":[25],"feature":[26],"parameter":[27],"data.":[28],"The":[29,62],"is":[31,149],"composed":[32],"five":[34],"main":[35],"modules:":[36],"Integral":[37,55],"Image":[38,56],"Calculator,":[39,42,45,47],"Feature":[40,43,59],"Coordinate":[41],"Difference":[44],"Cascade":[46],"Window":[49],"Detection.":[50],"It":[51,157],"also":[52],"includes":[53],"on-chip":[54],"memory":[57],"Parameter":[60],"memory.":[61],"was":[66],"verified":[67],"by":[68],"using":[69],"S3C2440A":[70],"CPU":[71],"Samsung":[73],"Electronics,":[74],"Virtex4LX100":[75,108],"FPGA":[76,91],"Xilinx,":[78],"CCD":[81],"Camera":[82],"module.":[83],"Our":[84],"uses":[86,118],"3,251":[87],"LUTs":[88],"Xilinx":[90],"takes":[93,133],"about":[94,119,124,129],"1.960.13":[95],"sec":[96,137],"depending":[100],"sliding-window":[102],"step":[103],"size,":[104],"when":[105],"synthesized":[106,111],"FPGA.":[109],"When":[110],"Magnachip":[113],"0.25um":[114],"ASIC":[115],"library,":[116],"it":[117,148],"410,000":[120],"gates":[121],"(Combinational":[122],"area":[123,128],"345,000":[125],"gates,":[126],"Noncombinational":[127],"65,000":[130],"gates)":[131],"less":[134],"than":[135],"0.5":[136],"realtime":[140],"detection.":[141],"size":[143],"performance":[145],"shows":[146],"that":[147],"adequate":[150],"to":[151,173],"use":[152],"embedded":[154],"system":[155],"applications.":[156],"has":[158],"been":[159],"fabricated":[160],"as":[161,165],"chip":[164,170],"part":[167],"XF1201":[169],"proven":[172],"work.":[174]},"counts_by_year":[],"updated_date":"2026-09-21T07:43:02.447757","created_date":"2016-06-24T00:00:00"}