{"id":"https://openalex.org/W2343299587","doi":null,"title":"Designing energy-efficient sub-threshold logic circuits using equalization and non-volatile memory circuits using memristors","display_name":"Designing energy-efficient sub-threshold logic circuits using equalization and non-volatile memory circuits using memristors","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W2343299587","mag":"2343299587"},"language":"en","primary_location":{"id":"pmh:oai:open.bu.edu:2144/16096","doi":null,"is_oa":false,"landing_page_url":"https://hdl.handle.net/2144/16096","pdf_url":null,"source":{"id":"https://openalex.org/S4306402384","display_name":"OpenBU (Boston University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I111088046","host_organization_name":"Boston University","host_organization_lineage":["https://openalex.org/I111088046"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Thesis/Dissertation"},"volume":null,"type":"dissertation","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003673883","display_name":"Mahmoud Zangeneh","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Mahmoud Zangeneh","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":["https://openalex.org/A5003673883"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.0008999999845400453,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristors","display_name":"memristors","score":0.8410000205039978},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"resistive random access memory","score":0.8159999847412109},{"id":"https://openalex.org/keywords/1t1r-memory-cell","display_name":"1T1R memory cell","score":0.8629999756813049},{"id":"https://openalex.org/keywords/tio2-memristor","display_name":"TiO2 memristor","score":0.7860000133514404},{"id":"https://openalex.org/keywords/energy-modeling","display_name":"energy modeling","score":0.6079999804496765},{"id":"https://openalex.org/keywords/leakage-energy","display_name":"leakage energy","score":0.6470000147819519},{"id":"https://openalex.org/keywords/timing-errors","display_name":"timing errors","score":0.6589999794960022},{"id":"https://openalex.org/keywords/carry-lookahead-adder","display_name":"carry look-ahead adder","score":0.8429999947547913},{"id":"https://openalex.org/keywords/energy-efficiency","display_name":"energy efficiency","score":0.3919999897480011},{"id":"https://openalex.org/keywords/process-variation","display_name":"process variation","score":0.3709999918937683},{"id":"https://openalex.org/keywords/cmos-scaling","display_name":"CMOS scaling","score":0.5320000052452087}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6968531608581543},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.5617706179618835},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5421697497367859},{"id":"https://openalex.org/C180405849","wikidata":"https://www.wikidata.org/wiki/Q173464","display_name":"Resistor\u2013transistor logic","level":5,"score":0.5004596710205078},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48290061950683594},{"id":"https://openalex.org/C75755367","wikidata":"https://www.wikidata.org/wiki/Q104531076","display_name":"Equalization (audio)","level":3,"score":0.47891008853912354},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4604294002056122},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4530579149723053},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.440116286277771},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.42918941378593445},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.37468522787094116},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3361680209636688},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2325936257839203},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1512676179409027},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.13752445578575134},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09536498785018921},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:oai:open.bu.edu:2144/16096","doi":null,"is_oa":false,"landing_page_url":"https://hdl.handle.net/2144/16096","pdf_url":null,"source":{"id":"https://openalex.org/S4306402384","display_name":"OpenBU (Boston University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I111088046","host_organization_name":"Boston University","host_organization_lineage":["https://openalex.org/I111088046"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Thesis/Dissertation"},{"id":"mag:2343299587","doi":null,"is_oa":false,"landing_page_url":"https://open.bu.edu/bitstream/2144/16096/1/Zangeneh_bu_0017E_11370.pdf","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5690000057220459,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2085205847","https://openalex.org/W2156555351","https://openalex.org/W4312569045","https://openalex.org/W7214324062","https://openalex.org/W2061255969","https://openalex.org/W4292060940","https://openalex.org/W4405460213","https://openalex.org/W2026429700","https://openalex.org/W2139203854","https://openalex.org/W2539842216"],"abstract_inverted_index":{"The":[0],"very":[1],"large":[2],"scale":[3],"integration":[4],"(VLSI)":[5],"community":[6],"has":[7],"utilized":[8],"aggressive":[9],"complementary":[10],"metal-oxide":[11],"semiconductor":[12],"(CMOS)":[13],"technology":[14,65],"scaling":[15,286],"to":[16,47,230,259,279,366,372,394,436],"meet":[17],"the":[18,29,32,38,55,95,108,120,158,164,194,220,225,232,246,261,281,291,295,302,306,320,336,348,356,360,373,396,402,425,430,440,458,470],"ever-increasing":[19],"performance":[20,109,145],"requirements":[21],"of":[22,98,227,235,248,273,305,429,457,472],"computing":[23],"systems.":[24],"However,":[25],"as":[26,69,123,466],"we":[27,93,223,299,452],"enter":[28],"nanoscale":[30],"regime,":[31],"prevalent":[33],"process":[34,58,397],"variation":[35,398,428],"effects":[36,399],"degrade":[37],"CMOS":[39,57],"device":[40],"reliability.":[41],"Hence,":[42],"it":[43],"is":[44,66,138],"increasingly":[45],"essential":[46],"explore":[48],"emerging":[49],"technologies":[50,136],"which":[51],"are":[52],"compatible":[53],"with":[54,81,255,390],"conventional":[56,374],"for":[59,113,134,179,209,469],"designing":[60,74],"highly-dense":[61],"memory/logic":[62],"circuits.":[63,411],"Memristor":[64],"being":[67],"explored":[68],"a":[70,124,139,154,249,310,325,380,413,467],"potential":[71],"candidate":[72],"in":[73,240,264,268,309,331,355,407,417,478],"non-volatile":[75],"memory":[76,104,117,121],"arrays":[77],"and":[78,86,110,119,130,133,144,150,170,183,200,213,400],"logic":[79,221,238,257,266,312,393,410,476],"circuits":[80,239,316,477],"high":[82],"density,":[83],"low":[84],"latency":[85],"small":[87],"energy":[88,111,143,167,172,197,202,233,284,322,350,405,447],"consumption.":[89,323],"In":[90,450],"this":[91],"thesis,":[92],"present":[94,107,453],"detailed":[96,454],"functionality":[97],"multi-bit":[99],"1-Transistor":[100],"1-memRistor":[101],"(1T1R)":[102],"cell-based":[103],"arrays.":[105],"We":[106,126,243,377],"models":[112,149,456],"an":[114],"individual":[115],"1T1R":[116],"cell":[118],"array":[122,162,192],"whole.":[125],"have":[127],"considered":[128],"TiO2-":[129],"HfOx-based":[131,190],"memristors,":[132],"these":[135],"there":[137],"sub-10%":[140],"difference":[141],"between":[142],"computed":[146],"using":[147,314],"our":[148,420],"HSPICE":[151],"simulations.":[152],"Using":[153],"performance-driven":[155],"design":[156,471],"approach,":[157],"energy-optimized":[159],"TiO2-based":[160],"RRAM":[161,191],"consumes":[163,193],"least":[165,195],"write":[166,182,196,212],"(4.06":[168],"pJ/bit)":[169],"read":[171,186,201,216],"(188":[173],"fJ/bit)":[174,199,204],"when":[175,205],"storing":[176,206],"3":[177,207],"bits/cell":[178,208],"100":[180],"nsec":[181,185,211,215],"1":[184,210],"access":[187,217],"times.":[188,218],"Similarly,":[189],"(365":[198],"(173":[203],"200":[214],"On":[219],"side,":[222],"investigate":[224],"use":[226,247],"equalization":[228,362],"techniques":[229],"improve":[231],"efficiency":[234],"digital":[236,265,392,409,475],"sequential":[237,391],"sub-threshold":[241,269,357,408,479],"regime.":[242,270,358,480],"first":[244],"propose":[245,379],"variable":[250],"threshold":[251],"feedback":[252,361,383,460],"equalizer":[253,315,384,461],"circuit":[254,385],"combinational":[256,311],"blocks":[258],"mitigate":[260,395],"timing":[262,274],"errors":[263,275],"designed":[267,330,416],"This":[271,463],"mitigation":[272],"can":[276,300,339,387,423],"be":[277,340,388],"leveraged":[278],"reduce":[280,401,424],"dominant":[282,403],"leakage":[283,321,349,404],"by":[285,342,351,443],"supply":[287,297,448],"voltage":[288],"or":[289],"decreasing":[290],"propagation":[292,303],"delay.":[293],"At":[294],"fixed":[296],"voltage,":[298],"decrease":[301,319],"delay":[304,427,433],"critical":[307,431],"path":[308,432],"block":[313],"and,":[317],"correspondingly":[318],"For":[324,412],"8-bit":[326],"carry":[327],"lookahead":[328],"adder":[329,415],"UMC":[332],"130":[333,418],"nm":[334,419],"process,":[335],"operating":[337],"frequency":[338],"increased":[341],"22.87%":[343],"(on":[344,353],"average),":[345],"while":[346,438],"reducing":[347,439],"22.6%":[352],"average)":[354],"Overall,":[359],"technique":[363],"provides":[364],"up":[365],"35.4%":[367],"lower":[368],"energy-delay":[369,441],"product":[370,442],"compared":[371],"non-equalized":[375],"logic.":[376],"also":[378],"tunable":[381],"adaptive":[382,459],"that":[386],"used":[389],"component":[406],"64-bit":[414],"proposed":[421],"approach":[422],"normalized":[426],"from":[434],"16.1%":[435],"11.4%":[437],"25.83%":[444],"at":[445],"minimum":[446],"voltage.":[449],"addition,":[451],"energy-performance":[455],"circuit.":[462],"work":[464],"serves":[465],"foundation":[468],"robust,":[473],"energy-efficient":[474]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-08-08T01:25:22.217667","created_date":"2016-06-24T00:00:00"}
