{"id":"https://openalex.org/W2273242539","doi":"https://doi.org/10.1109/rme.2005.1542960","title":"Semi-automated design of a MOS currentmode logic standard cell library from generic components","display_name":"Semi-automated design of a MOS currentmode logic standard cell library from generic components","publication_year":2005,"publication_date":"2005-12-13","ids":{"openalex":"https://openalex.org/W2273242539","doi":"https://doi.org/10.1109/rme.2005.1542960","mag":"2273242539"},"language":"en","primary_location":{"id":"doi:10.1109/rme.2005.1542960","doi":"https://doi.org/10.1109/rme.2005.1542960","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rme.2005.1542960","pdf_url":null,"source":{"id":"https://openalex.org/S4306525851","display_name":"Research in Microelectronics and Electronics, 2005 PhD","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Research in Microelectronics and Electronics, 2005 PhD","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/63767","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067187266","display_name":"St\u00e9phane Badel","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"S. Badel","raw_affiliation_strings":["Laboratoire de Syst\u00e8mes Micro\u00e9lectroniques, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire de Syst\u00e8mes Micro\u00e9lectroniques, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023966754","display_name":"\u0130. Hatirnaz","orcid":"https://orcid.org/0009-0002-6240-146X","observed_orcids":["https://orcid.org/0009-0002-6240-146X"]},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"I. Hatirnaz","raw_affiliation_strings":["Laboratoire de Syst\u00e8mes Micro\u00e9lectroniques, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire de Syst\u00e8mes Micro\u00e9lectroniques, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072423303","display_name":"Yusuf Leblebici","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Y. Leblebici","raw_affiliation_strings":["Laboratoire de Syst\u00e8mes Micro\u00e9lectroniques, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire de Syst\u00e8mes Micro\u00e9lectroniques, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":0.5498,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.69306387,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"2","issue":null,"first_page":"155","last_page":"158"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.5038999915122986,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.5038999915122986,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.4812000095844269,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.004699999932199717,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mos-current-mode-logic","display_name":"MOS current mode logic","score":0.8650000095367432},{"id":"https://openalex.org/keywords/standard-cell-library","display_name":"standard cell library","score":0.9729999899864197},{"id":"https://openalex.org/keywords/semi-automated-design","display_name":"semi-automated design","score":0.7929999828338623},{"id":"https://openalex.org/keywords/generic-components","display_name":"generic components","score":0.9610000252723694},{"id":"https://openalex.org/keywords/transistor-sizing","display_name":"transistor sizing","score":0.5370000004768372},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"combinational logic","score":0.6570000052452087},{"id":"https://openalex.org/keywords/sequential-circuits","display_name":"sequential circuits","score":0.9670000076293945},{"id":"https://openalex.org/keywords/0-18-mum-cmos","display_name":"0.18 \u03bcm CMOS","score":0.8529999852180481}],"concepts":[{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.6070747971534729},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5995609164237976},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3831649422645569},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3446454405784607},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.11521926522254944},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09534206986427307}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/rme.2005.1542960","doi":"https://doi.org/10.1109/rme.2005.1542960","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rme.2005.1542960","pdf_url":null,"source":{"id":"https://openalex.org/S4306525851","display_name":"Research in Microelectronics and Electronics, 2005 PhD","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Research in Microelectronics and Electronics, 2005 PhD","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.365.5096","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.365.5096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://infoscience.epfl.ch/record/63767/files/badel_prime05.pdf","raw_type":"text"},{"id":"pmh:oai:infoscience.epfl.ch:63767","doi":null,"is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/63767","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I5124864","host_organization_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","host_organization_lineage":["https://openalex.org/I5124864"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},{"id":"pmh:oai:infoscience.tind.io:63767","doi":null,"is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/63767","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I5124864","host_organization_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","host_organization_lineage":["https://openalex.org/I5124864"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"conference proceedings"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:63767","doi":null,"is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/63767","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I5124864","host_organization_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","host_organization_lineage":["https://openalex.org/I5124864"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1541494431","https://openalex.org/W1595570256","https://openalex.org/W1596301242","https://openalex.org/W1596984630","https://openalex.org/W1686925915","https://openalex.org/W1892697659","https://openalex.org/W2072569245","https://openalex.org/W2097154741","https://openalex.org/W2103486973","https://openalex.org/W2132466715","https://openalex.org/W4230728857"],"related_works":["https://openalex.org/W4240191904","https://openalex.org/W2988739384","https://openalex.org/W2105053951","https://openalex.org/W2157679806","https://openalex.org/W6884642074","https://openalex.org/W2097138229","https://openalex.org/W2019520936","https://openalex.org/W7055391850","https://openalex.org/W7098378185","https://openalex.org/W7099552999"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"the":[3,35,47],"design":[4,42],"and":[5,27,44],"semi-automated":[6],"generation":[7],"of":[8,18,25,34,55],"a":[9,22],"MOS":[10],"current-mode":[11],"logic":[12],"standard":[13],"cell":[14],"library.":[15],"A":[16],"set":[17],"generic":[19,36],"components":[20,37],"implementing":[21],"wide":[23],"range":[24],"combinational":[26],"sequential":[28],"functions":[29],"is":[30,64],"proposed.":[31],"The":[32],"layout":[33],"being":[38],"parameterized":[39],"for":[40],"process":[41],"rules":[43],"transistor":[45],"dimensions,":[46],"library":[48],"can":[49],"be":[50],"mapped":[51],"to":[52],"different":[53],"generations":[54],"CMOS":[56,62],"processes.":[57],"An":[58],"implementation":[59],"in":[60],"0.18um":[61],"technology":[63],"presented.":[65],"1.":[66]},"counts_by_year":[{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1}],"updated_date":"2026-10-18T09:31:52.927876","created_date":"2016-06-24T00:00:00"}
