{"id":"https://openalex.org/W2265089517","doi":"https://doi.org/10.1007/978-3-319-11104-9_116","title":"An Energy-Efficient Dual-Level Cache Architecture for Chip Multiprocessors","display_name":"An Energy-Efficient Dual-Level Cache Architecture for Chip Multiprocessors","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W2265089517","doi":"https://doi.org/10.1007/978-3-319-11104-9_116","mag":"2265089517"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-319-11104-9_116","doi":"https://doi.org/10.1007/978-3-319-11104-9_116","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-319-11104-9_116","pdf_url":null,"source":{"id":"https://openalex.org/S4210179954","display_name":"Lecture notes in electrical engineering","issn_l":"1876-1100","issn":["1876-1100","1876-1119"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Electrical Engineering","raw_type":"book-chapter"},"volume":{"id":"https://openalex.org/W2496116842","display_name":"Proceedings of the 4th International Conference on Computer Engineering and Networks"},"type":"book-chapter","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086507522","display_name":"Mian Lou","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Mian Lou","raw_affiliation_strings":["Research Center of SoC, Xi\u2019an Microelectronics Technology Institute, 710054, Xi\u2019an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Research Center of SoC, Xi\u2019an Microelectronics Technology Institute, 710054, Xi\u2019an, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018010656","display_name":"Longsheng Wu","orcid":"https://orcid.org/0000-0001-9099-3883","observed_orcids":["https://orcid.org/0000-0001-9099-3883"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Longsheng Wu","raw_affiliation_strings":["Research Center of SoC, Xi\u2019an Microelectronics Technology Institute, 710054, Xi\u2019an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Research Center of SoC, Xi\u2019an Microelectronics Technology Institute, 710054, Xi\u2019an, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081834292","display_name":"Senmao Shi","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Senmao Shi","raw_affiliation_strings":["Research Center of SoC, Xi\u2019an Microelectronics Technology Institute, 710054, Xi\u2019an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Research Center of SoC, Xi\u2019an Microelectronics Technology Institute, 710054, Xi\u2019an, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034216385","display_name":"Pengwei Lu","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pengwei Lu","raw_affiliation_strings":["Research Center of SoC, Xi\u2019an Microelectronics Technology Institute, 710054, Xi\u2019an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Research Center of SoC, Xi\u2019an Microelectronics Technology Institute, 710054, Xi\u2019an, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":["https://openalex.org/A5086507522"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2664,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.78828829,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"1011","last_page":"1018"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9829000234603882,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9829000234603882,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.012000000104308128,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.002099999925121665,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multi-core-processors","display_name":"multi-core processors","score":0.9549999833106995},{"id":"https://openalex.org/keywords/energy-efficiency","display_name":"energy efficiency","score":0.7049999833106995},{"id":"https://openalex.org/keywords/multi-step-forecasting","display_name":"multi-step forecasting","score":0.5709999799728394}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8244471549987793},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7943859100341797},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.6817915439605713},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.6237713098526001},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.6190447211265564},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.5847936868667603},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5723880529403687},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.48181548714637756},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.47779661417007446},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47682493925094604},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4528438150882721},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4131152629852295},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.4130600094795227},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4042506515979767},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.19396433234214783},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-319-11104-9_116","doi":"https://doi.org/10.1007/978-3-319-11104-9_116","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-319-11104-9_116","pdf_url":null,"source":{"id":"https://openalex.org/S4210179954","display_name":"Lecture notes in electrical engineering","issn_l":"1876-1100","issn":["1876-1100","1876-1119"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Electrical Engineering","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1964837280","https://openalex.org/W1978822437","https://openalex.org/W2010391153","https://openalex.org/W2010895868","https://openalex.org/W2073813612","https://openalex.org/W2074633331","https://openalex.org/W2078051707","https://openalex.org/W2094231231","https://openalex.org/W2140480749","https://openalex.org/W2144195166","https://openalex.org/W2160602621","https://openalex.org/W2170510345","https://openalex.org/W2185140294","https://openalex.org/W4213326783","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W4247139772","https://openalex.org/W2010572051","https://openalex.org/W2189184899","https://openalex.org/W2346995236","https://openalex.org/W2010391153","https://openalex.org/W2119850103","https://openalex.org/W2036685550","https://openalex.org/W2188164748","https://openalex.org/W2270982805","https://openalex.org/W2079777166"],"abstract_inverted_index":null,"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-10-10T09:11:00.788812","created_date":"2016-06-24T00:00:00"}
