{"id":"https://openalex.org/W2188789313","doi":null,"title":"DESIGN STRATEGIES VERSUS NolwICAL OPTMIZATION FOR AN- CIRCUITS","display_name":"DESIGN STRATEGIES VERSUS NolwICAL OPTMIZATION FOR AN- CIRCUITS","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2188789313","mag":"2188789313"},"language":"en","primary_location":{"id":"mag:2188789313","doi":null,"is_oa":false,"landing_page_url":"http://ieeexplore.ieee.org/iel2/815/3148/00100549.pdf","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null},"volume":null,"type":"article","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088044558","display_name":"B.L.A.G. Goffart","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"B. Goffart","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087252360","display_name":"J. Litsios","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"J. Litsios","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5074205827","display_name":"M.G.R. Degrauwe","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Degrauwe","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9824000000953674,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9824000000953674,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.00930000003427267,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.0027000000700354576,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/analog-circuit-design","display_name":"analog circuit design","score":0.9520000219345093},{"id":"https://openalex.org/keywords/numerical-optimization","display_name":"numerical optimization","score":0.7950000166893005},{"id":"https://openalex.org/keywords/analog-building-blocks","display_name":"analog building blocks","score":0.878000020980835},{"id":"https://openalex.org/keywords/amplifiers","display_name":"amplifiers","score":0.8410000205039978},{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"operational transconductance amplifier","score":0.9649999737739563},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"voltage reference","score":0.972000002861023},{"id":"https://openalex.org/keywords/design-environment","display_name":"design environment","score":0.7059999704360962}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5139245986938477},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.502234935760498},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5014805793762207},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.49065151810646057},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.465139776468277},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.4167467951774597},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3162463307380676},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2872501313686371},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.1269456148147583},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"mag:2188789313","doi":null,"is_oa":false,"landing_page_url":"http://ieeexplore.ieee.org/iel2/815/3148/00100549.pdf","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1494497668","https://openalex.org/W1994218207","https://openalex.org/W2053921661","https://openalex.org/W2113329856"],"related_works":["https://openalex.org/W1582790312","https://openalex.org/W437799995","https://openalex.org/W361840848","https://openalex.org/W2434827525","https://openalex.org/W2902462441","https://openalex.org/W63712882","https://openalex.org/W4232118198","https://openalex.org/W2306682566","https://openalex.org/W1573974531","https://openalex.org/W3196689968"],"abstract_inverted_index":{"A":[0],"design":[1,32],"environment":[2],"allowing":[3],"to":[4],"design,":[5],"analyse":[6],"and":[7,25],"optimize":[8],"analog":[9],"building":[10],"blocks,":[11],"such":[12],"as":[13],"amplifiers,":[14],"OTA's,":[15],"voltage":[16],"reference,":[17],"etc...,":[18],"has":[19],"been":[20],"developed.":[21],"The":[22],"relative":[23],"merit":[24],"disadvantages":[26],"of":[27],"numerical":[28],"optimization":[29],"versus":[30],"analytical":[31],"strategies":[33],"are":[34],"discussed.":[35]},"counts_by_year":[],"updated_date":"2026-09-22T06:50:58.402377","created_date":"2016-06-24T00:00:00"}