{"id":"https://openalex.org/W2171376159","doi":"https://doi.org/10.1109/12.736437","title":"Asynchronous parallel prefix computation","display_name":"Asynchronous parallel prefix computation","publication_year":1998,"publication_date":"1998-01-01","ids":{"openalex":"https://openalex.org/W2171376159","doi":"https://doi.org/10.1109/12.736437","mag":"2171376159"},"language":"en","primary_location":{"id":"doi:10.1109/12.736437","doi":"https://doi.org/10.1109/12.736437","is_oa":false,"landing_page_url":"https://doi.org/10.1109/12.736437","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-3","norway-2","poland-140","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002575415","display_name":"Rajit Manohar","orcid":"https://orcid.org/0000-0001-8211-6602","observed_orcids":["https://orcid.org/0000-0001-8211-6602"]},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Manohar","raw_affiliation_strings":["Department of Electrical Engineering, Cornell University, Ithaca, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110228319","display_name":"J. Tierno","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.A. Tierno","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":0.4656,"has_fulltext":false,"cited_by_count":30,"citation_normalized_percentile":{"value":0.60598032,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":95},"biblio":{"volume":"47","issue":"11","first_page":"1244","last_page":"1252"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.4438000023365021,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.4438000023365021,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.26249998807907104,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10720","display_name":"Complexity and Algorithms in Graphs","score":0.09989999979734421,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parallel-prefix-computation","display_name":"parallel prefix computation","score":0.8349999785423279},{"id":"https://openalex.org/keywords/asynchronous-circuits","display_name":"asynchronous circuits","score":0.9620000123977661},{"id":"https://openalex.org/keywords/associative-binary-operations","display_name":"associative binary operations","score":0.8379999995231628},{"id":"https://openalex.org/keywords/circuit-size","display_name":"circuit size","score":0.39800000190734863}],"concepts":[{"id":"https://openalex.org/C63553672","wikidata":"https://www.wikidata.org/wiki/Q581168","display_name":"Binary logarithm","level":2,"score":0.7289143204689026},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.7273886203765869},{"id":"https://openalex.org/C195292467","wikidata":"https://www.wikidata.org/wiki/Q2091879","display_name":"Log-log plot","level":3,"score":0.6923131942749023},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6362308263778687},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6313573122024536},{"id":"https://openalex.org/C141603448","wikidata":"https://www.wikidata.org/wiki/Q134830","display_name":"Prefix","level":2,"score":0.6198810338973999},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5107822418212891},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4973321259021759},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4753056466579437},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4704275131225586},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.4069943428039551},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.4062039256095886},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.4056828022003174},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11013329029083252},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/12.736437","doi":"https://doi.org/10.1109/12.736437","is_oa":false,"landing_page_url":"https://doi.org/10.1109/12.736437","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-3","norway-2","poland-140","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1496427046","https://openalex.org/W1572873133","https://openalex.org/W1982530285","https://openalex.org/W2003020124","https://openalex.org/W2021330840","https://openalex.org/W2029005287","https://openalex.org/W2097755092","https://openalex.org/W2142118268","https://openalex.org/W2143462372","https://openalex.org/W3144368627","https://openalex.org/W4211008702","https://openalex.org/W6629604270"],"related_works":["https://openalex.org/W2953272212","https://openalex.org/W2033475295","https://openalex.org/W2082419751","https://openalex.org/W7097255346","https://openalex.org/W1635542106","https://openalex.org/W2066398100","https://openalex.org/W2143462372","https://openalex.org/W288370156","https://openalex.org/W2738094183","https://openalex.org/W7097240281"],"abstract_inverted_index":{"The":[0,95],"prefix":[1],"problem":[2,37],"is":[3,23],"to":[4,34,61,72,86,100],"compute":[5],"all":[6],"the":[7,53,62,84],"products":[8],"x/sub":[9],"1//spl":[10],"otimes/x/sub":[11,14],"2//spl":[12],"otimes/.../spl":[13],"k/,":[15],"for":[16],"1/spl":[17],"les/k/spl":[18],"les/n,":[19],"where":[20],"/spl":[21,50],"otimes/":[22],"an":[24,31,102],"associative":[25],"binary":[26],"operation.":[27],"We":[28],"start":[29],"with":[30,38,48,91,105],"asynchronous":[32,103],"circuit":[33,46,63,85],"solve":[35],"this":[36],"O(log":[39,70,73,106,111],"n)":[40,45,71,75,107,113],"latency":[41,68,109],"and":[42,77,110],"O(n":[43],"log":[44,74,112],"size,":[47],"O(n)":[49],"otimes/-operations":[51],"in":[52],"circuit.":[54],"Our":[55],"contributions":[56],"are:":[57],"(1)":[58],"a":[59,79],"modification":[60,81],"that":[64,82],"improves":[65],"its":[66],"average-case":[67,114],"from":[69],"time,":[76],"(2)":[78],"further":[80],"allows":[83],"run":[87],"at":[88],"full-throughput,":[89],"i.e.,":[90],"constant":[92],"response":[93],"time.":[94],"construction":[96],"can":[97],"be":[98],"used":[99],"obtain":[101],"adder":[104],"worst-case":[108],"latency.":[115]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-10-16T09:59:22.235173","created_date":"2016-06-24T00:00:00"}