{"id":"https://openalex.org/W2168961888","doi":"https://doi.org/10.1145/1248377.1248436","title":"Using SIMD registers and instructions to enable instruction-level parallelism in sorting algorithms","display_name":"Using SIMD registers and instructions to enable instruction-level parallelism in sorting algorithms","publication_year":2007,"publication_date":"2007-06-09","ids":{"openalex":"https://openalex.org/W2168961888","doi":"https://doi.org/10.1145/1248377.1248436","mag":"2168961888"},"language":"en","primary_location":{"id":"doi:10.1145/1248377.1248436","doi":"https://doi.org/10.1145/1248377.1248436","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1248377.1248436","pdf_url":null,"source":{"id":"https://openalex.org/S7407088212","display_name":"ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085053889","display_name":"Timothy Furtak","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I154425047","display_name":"University of Alberta","ror":"https://ror.org/0160cpw27","country_code":"CA","type":"education","lineage":["https://openalex.org/I154425047"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Timothy Furtak","raw_affiliation_strings":["University of Alberta, Edmonton, AB, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Alberta, Edmonton, AB, Canada","institution_ids":["https://openalex.org/I154425047"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048554669","display_name":"Jos\u00e9 Nelson Amaral","orcid":"https://orcid.org/0000-0002-9943-1809","observed_orcids":["https://orcid.org/0000-0002-9943-1809"]},"institutions":[{"id":"https://openalex.org/I154425047","display_name":"University of Alberta","ror":"https://ror.org/0160cpw27","country_code":"CA","type":"education","lineage":["https://openalex.org/I154425047"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jos\u00e9 Nelson Amaral","raw_affiliation_strings":["University of Alberta, Edmonton, AB, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Alberta, Edmonton, AB, Canada","institution_ids":["https://openalex.org/I154425047"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013693689","display_name":"Robert Niewiadomski","orcid":"https://orcid.org/0000-0003-3008-0606","observed_orcids":["https://orcid.org/0000-0003-3008-0606"]},"institutions":[{"id":"https://openalex.org/I154425047","display_name":"University of Alberta","ror":"https://ror.org/0160cpw27","country_code":"CA","type":"education","lineage":["https://openalex.org/I154425047"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Robert Niewiadomski","raw_affiliation_strings":["University of Alberta, Edmonton, AB, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Alberta, Edmonton, AB, Canada","institution_ids":["https://openalex.org/I154425047"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I154425047"],"apc_list":null,"apc_paid":null,"fwci":1.2515,"has_fulltext":false,"cited_by_count":43,"citation_normalized_percentile":{"value":0.78862509,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"348","last_page":"357"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2614","display_name":"Theoretical Computer Science"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10317","display_name":"Advanced Database Systems and Queries","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.9139999747276306},{"id":"https://openalex.org/keywords/vector-registers","display_name":"vector registers","score":0.6759999990463257},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"instruction-level parallelism","score":0.9879999756813049},{"id":"https://openalex.org/keywords/sorting-algorithms","display_name":"sorting algorithms","score":0.8119999766349792},{"id":"https://openalex.org/keywords/sse2","display_name":"SSE2","score":0.8399999737739563},{"id":"https://openalex.org/keywords/altivec","display_name":"AltiVec","score":0.9980000257492065},{"id":"https://openalex.org/keywords/code-generation","display_name":"code generation","score":0.6399999856948853}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.86036217212677},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.8451848030090332},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.8166725039482117},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.742990255355835},{"id":"https://openalex.org/C111696304","wikidata":"https://www.wikidata.org/wiki/Q2303697","display_name":"Sorting","level":2,"score":0.6553812026977539},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.5126675367355347},{"id":"https://openalex.org/C108094655","wikidata":"https://www.wikidata.org/wiki/Q181593","display_name":"Sorting algorithm","level":3,"score":0.48925185203552246},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.48321497440338135},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3444490432739258},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.31761765480041504}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1248377.1248436","doi":"https://doi.org/10.1145/1248377.1248436","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1248377.1248436","pdf_url":null,"source":{"id":"https://openalex.org/S7407088212","display_name":"ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.390.9749","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.390.9749","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://ce.sharif.ac.ir/~ghodsi/archive/d-papers/SPAA/2007/Using SIMD Registers and Instructions to Enable Instruction-Level Parallelism in Sorting Algorithms.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.91.6723","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.91.6723","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.ualberta.ca/~niewiado/TR07-02.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1600795850","https://openalex.org/W1770769440","https://openalex.org/W1964031104","https://openalex.org/W1985821389","https://openalex.org/W2002560134","https://openalex.org/W2019235922","https://openalex.org/W2040755057","https://openalex.org/W2058372704","https://openalex.org/W2062060002","https://openalex.org/W2068822255","https://openalex.org/W2072277531","https://openalex.org/W2090268225","https://openalex.org/W2122403525","https://openalex.org/W2134431066","https://openalex.org/W2141389982","https://openalex.org/W2159164495","https://openalex.org/W2162169073","https://openalex.org/W2164197394","https://openalex.org/W2167639788","https://openalex.org/W2752853835","https://openalex.org/W2776089907","https://openalex.org/W3027900649","https://openalex.org/W4244894488","https://openalex.org/W4245987756","https://openalex.org/W4250030285"],"related_works":["https://openalex.org/W2007967266","https://openalex.org/W2153952995","https://openalex.org/W2596222508","https://openalex.org/W7096279596","https://openalex.org/W2150887845","https://openalex.org/W2134431066","https://openalex.org/W6959562792","https://openalex.org/W191682391","https://openalex.org/W7095716673","https://openalex.org/W3165524887"],"abstract_inverted_index":{"Most":[0],"contemporary":[1],"processors":[2],"offer":[3],"some":[4],"version":[5],"of":[6,28,41,44,51,78,154],"Single":[7],"Instruction":[8],"Multiple":[9],"Data":[10],"(SIMD)":[11],"machinery":[12],"\u2014":[13,85,91],"vector":[14,65],"registers":[15],"and":[16,69,88],"instructions":[17],"to":[18,32,37,53,74,105,139,160],"manipulate":[19],"data":[20,60],"stored":[21,72],"in":[22],"such":[23],"registers.":[24],"The":[25,100],"central":[26],"idea":[27,95],"this":[29,94,127],"paper":[30],"is":[31,61,156],"use":[33],"these":[34],"SIMD":[35,83],"resources":[36],"improve":[38],"the":[39,42,49,64,70,106,121,133],"performance":[40,153],"tail":[43],"recursive":[45],"sorting":[46,79,115],"algorithms.":[47],"When":[48,118],"number":[50],"elements":[52],"be":[54],"sorted":[55],"reaches":[56],"a":[57,113,164],"set":[58],"threshold,":[59],"loaded":[62],"into":[63],"registers,":[66],"manipulated":[67],"in-register,":[68],"result":[71],"back":[73],"memory.":[75],"Three":[76],"implementations":[77],"with":[80,120,145],"two":[81],"different":[82],"machineries":[84],"x86-64\u2019s":[86],"SSE2":[87],"G5\u2019s":[89],"AltiVec":[90],"demonstrate":[92],"that":[93],"delivers":[96],"significant":[97],"speed":[98],"improvements.":[99],"improvements":[101],"provided":[102],"are":[103],"orthogonal":[104],"gains":[107],"obtained":[108],"through":[109],"empirical":[110],"search":[111],"for":[112,142,149],"suitable":[114],"algorithm":[116],"[11].":[117],"integrated":[119],"Dynamically":[122],"Tuned":[123],"Sorting":[124],"Library":[125],"(DTSL)":[126],"new":[128],"code":[129],"generation":[130],"strategy":[131],"reduces":[132],"time":[134],"spent":[135],"by":[136,158],"DTSL":[137],"up":[138,159],"22":[140],"%":[141,162],"moderately-sized":[143],"arrays,":[144],"greater":[146],"relative":[147],"reductions":[148],"small":[150],"arrays.":[151],"Wall-clock":[152],"d-heaps":[155],"improved":[157],"39":[161],"using":[163],"similar":[165],"technique.":[166]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}