{"id":"https://openalex.org/W2164100793","doi":"https://doi.org/10.1109/icise.2009.603","title":"FPGA Based Parallel Architectures for Normalized Cross-Correlation","display_name":"FPGA Based Parallel Architectures for Normalized Cross-Correlation","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W2164100793","doi":"https://doi.org/10.1109/icise.2009.603","mag":"2164100793"},"language":"en","primary_location":{"id":"doi:10.1109/icise.2009.603","doi":"https://doi.org/10.1109/icise.2009.603","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icise.2009.603","pdf_url":null,"source":{"id":"https://openalex.org/S4306419560","display_name":"International Conference on Information Science and Engineering","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 First International Conference on Information Science and Engineering","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100695220","display_name":"Xiaotao Wang","orcid":"https://orcid.org/0000-0002-4131-7763","observed_orcids":["https://orcid.org/0000-0002-4131-7763"]},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]},{"id":"https://openalex.org/I9842412","display_name":"Nanjing University of Aeronautics and Astronautics","ror":"https://ror.org/01scyh794","country_code":"CN","type":"education","lineage":["https://openalex.org/I9842412"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaotao Wang","raw_affiliation_strings":["College of Astronautics, Nanjing University of Aeronautics and Astronautics, Nanjing, China","School of Control Science and Engineering, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Astronautics, Nanjing University of Aeronautics and Astronautics, Nanjing, China","institution_ids":["https://openalex.org/I9842412"]},{"raw_affiliation_string":"School of Control Science and Engineering, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100663087","display_name":"Xingbo Wang","orcid":"https://orcid.org/0000-0003-4764-9387","observed_orcids":["https://orcid.org/0000-0003-4764-9387"]},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]},{"id":"https://openalex.org/I9842412","display_name":"Nanjing University of Aeronautics and Astronautics","ror":"https://ror.org/01scyh794","country_code":"CN","type":"education","lineage":["https://openalex.org/I9842412"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xingbo Wang","raw_affiliation_strings":["College of Astronautics, Nanjing University of Aeronautics and Astronautics, Nanjing, China","School of Control Science and Engineering, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Astronautics, Nanjing University of Aeronautics and Astronautics, Nanjing, China","institution_ids":["https://openalex.org/I9842412"]},{"raw_affiliation_string":"School of Control Science and Engineering, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9359,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.65410947,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"225","last_page":"229"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9520999789237976,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9520999789237976,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.019999999552965164,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.014499999582767487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/normalized-cross-correlation","display_name":"normalized cross-correlation","score":1.0},{"id":"https://openalex.org/keywords/fpga","display_name":"FPGA","score":0.6150000095367432},{"id":"https://openalex.org/keywords/parallel-architecture","display_name":"parallel architecture","score":0.9179999828338623},{"id":"https://openalex.org/keywords/hardware-implementation","display_name":"hardware implementation","score":0.8009999990463257},{"id":"https://openalex.org/keywords/real-time-image-processing","display_name":"real-time image processing","score":0.734000027179718},{"id":"https://openalex.org/keywords/target-recognition","display_name":"target recognition","score":0.7990000247955322},{"id":"https://openalex.org/keywords/image-matching","display_name":"image matching","score":0.9490000009536743},{"id":"https://openalex.org/keywords/computational-time-reduction","display_name":"computation time reduction","score":0.7300000190734863}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8887815475463867},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.78697270154953},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.5418596267700195},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5237536430358887},{"id":"https://openalex.org/C163018871","wikidata":"https://www.wikidata.org/wiki/Q1302587","display_name":"Cross-correlation","level":2,"score":0.494050532579422},{"id":"https://openalex.org/C103278499","wikidata":"https://www.wikidata.org/wiki/Q254465","display_name":"Similarity (geometry)","level":3,"score":0.4728287160396576},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.435048371553421},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.4216832220554352},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3825439214706421},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35597363114356995},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34721648693084717},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3386920392513275},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.33711445331573486},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2896798849105835},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24107056856155396},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icise.2009.603","doi":"https://doi.org/10.1109/icise.2009.603","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icise.2009.603","pdf_url":null,"source":{"id":"https://openalex.org/S4306419560","display_name":"International Conference on Information Science and Engineering","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 First International Conference on Information Science and Engineering","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W57003727","https://openalex.org/W2098627692","https://openalex.org/W2138571671"],"related_works":["https://openalex.org/W2386980307","https://openalex.org/W2098627692","https://openalex.org/W2998447935","https://openalex.org/W1966497798","https://openalex.org/W2904499802","https://openalex.org/W3213361457","https://openalex.org/W2905280421","https://openalex.org/W2385060900","https://openalex.org/W2361140782","https://openalex.org/W1989264203"],"abstract_inverted_index":{"As":[0],"a":[1,10],"similarity":[2],"measure,":[3],"normalized":[4,21,48],"cross-correlation":[5,22,49],"has":[6],"found":[7],"application":[8],"in":[9,58,84,109],"broad":[11],"range":[12],"of":[13,20,28,47,93,126],"image":[14,113],"processing.":[15],"A":[16],"dedicated":[17],"hardware":[18],"implementation":[19,46],"is":[23],"crucial":[24],"for":[25,44],"the":[26,89,94,123,127],"requirements":[27],"real-time":[29,45],"high-speed":[30],"tasks":[31],"such":[32],"as":[33],"automatic":[34],"target":[35,110,129],"matching,":[36],"recognition":[37,111,130],"and":[38,75,99,106],"tracking.":[39],"Two":[40],"efficient":[41,66],"parallel":[42],"architectures":[43,80,119],"using":[50,112],"field":[51],"programmable":[52],"gate":[53],"array":[54],"(FPGA)":[55],"are":[56,68],"proposed":[57,69],"this":[59],"paper.":[60],"In":[61],"these":[62,118],"architectures,":[63],"several":[64],"novel":[65],"approaches":[67],"to":[70,88],"reduce":[71],"logic":[72],"resource":[73,92],"usage":[74],"computation":[76],"time.":[77],"These":[78],"two":[79],"can":[81,120],"be":[82],"applied":[83],"different":[85],"situations":[86],"according":[87],"practical":[90,107,128],"available":[91],"FPGA":[95],"chip":[96],"used.":[97],"Function":[98],"timing":[100],"simulation":[101],"with":[102],"Quartus":[103],"II":[104],"8.0":[105],"experiment":[108],"matching":[114],"have":[115],"shown":[116],"that":[117],"effectively":[121],"improve":[122],"speed":[124],"performance":[125],"system.":[131]},"counts_by_year":[{"year":2021,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-10-26T11:51:55.731654","created_date":"2016-06-24T00:00:00"}