{"id":"https://openalex.org/W2159054268","doi":null,"title":"What Every Programmer Should Know About Memory","display_name":"What Every Programmer Should Know About Memory","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2159054268","mag":"2159054268"},"language":"en","primary_location":{"id":"pmh:oai:CiteSeerX.psu:10.1.1.91.957","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.91.957","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://people.redhat.com/drepper/cpumemory.pdf","raw_type":"text"},"volume":null,"type":"article","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006985358","display_name":"Ulrich Drepper","orcid":"https://orcid.org/0009-0004-5120-7869","observed_orcids":["https://orcid.org/0009-0004-5120-7869"]},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Ulrich Drepper","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0009-0004-5120-7869","affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":["https://openalex.org/A5006985358"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":13.0329,"has_fulltext":false,"cited_by_count":266,"citation_normalized_percentile":{"value":0.98672506,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":95,"max":100},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12127","display_name":"Software System Performance and Reliability","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memory-subsystem","display_name":"memory subsystem","score":0.5979999899864197},{"id":"https://openalex.org/keywords/cache","display_name":"cache memory","score":0.9890000224113464},{"id":"https://openalex.org/keywords/cache-optimization","display_name":"cache optimization","score":0.6209999918937683},{"id":"https://openalex.org/keywords/memory-access-performance","display_name":"memory access performance","score":0.7929999828338623},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"cache coherence","score":0.4580000042915344},{"id":"https://openalex.org/keywords/cache-hierarchy","display_name":"cache hierarchy","score":0.3449999988079071},{"id":"https://openalex.org/keywords/commodity-hardware","display_name":"commodity hardware","score":0.35600000619888306}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8053171634674072},{"id":"https://openalex.org/C2778514511","wikidata":"https://www.wikidata.org/wiki/Q1374194","display_name":"Programmer","level":2,"score":0.7689914703369141},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.5825763940811157},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.5152816772460938},{"id":"https://openalex.org/C188198153","wikidata":"https://www.wikidata.org/wiki/Q1613840","display_name":"Limiting","level":2,"score":0.4788774847984314},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46067461371421814},{"id":"https://openalex.org/C18131444","wikidata":"https://www.wikidata.org/wiki/Q163585","display_name":"Memory protection","level":5,"score":0.4237842559814453},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.4153946042060852},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.40319138765335083},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.34675535559654236},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3282957673072815},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.22923633456230164},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2076764702796936},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.06885701417922974},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:oai:CiteSeerX.psu:10.1.1.91.957","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.91.957","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://people.redhat.com/drepper/cpumemory.pdf","raw_type":"text"},{"id":"mag:2159054268","doi":null,"is_oa":false,"landing_page_url":"http://cgvr.cs.uni-bremen.de/teaching/mpar_literatur/What%20Every%20Programmer%20Should%20Know%20About%20Memory%20-%20Ulrich%20Drepper,%202007.pdf","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W87616783","https://openalex.org/W1986732422","https://openalex.org/W2062558947","https://openalex.org/W2113751407","https://openalex.org/W2126569725","https://openalex.org/W2137755180","https://openalex.org/W2153131460","https://openalex.org/W2169004268","https://openalex.org/W2184804519","https://openalex.org/W2186010977","https://openalex.org/W3098992421"],"related_works":["https://openalex.org/W2012022879","https://openalex.org/W7099817122","https://openalex.org/W2033171136","https://openalex.org/W7100468364","https://openalex.org/W7096903260","https://openalex.org/W63770251","https://openalex.org/W7100416760","https://openalex.org/W7096836336","https://openalex.org/W190610574","https://openalex.org/W4300833535"],"abstract_inverted_index":{"As":[0],"CPU":[1,40,94],"cores":[2],"become":[3],"both":[4],"faster":[5],"and":[6,17,36,101],"more":[7,32],"numerous,":[8],"the":[9,50,54,57,61,68,81],"limiting":[10],"factor":[11],"for":[12,20],"most":[13,76],"programs":[14,103],"is":[15,72],"now,":[16],"will":[18],"be":[19],"some":[21,47],"time,":[22],"memory":[23,34,62,84],"access.":[24],"Hardware":[25],"designers":[26],"have":[27],"come":[28],"up":[29],"with":[30],"ever":[31],"sophisticated":[33],"handling":[35],"acceleration":[37],"techniques\u2013such":[38],"as":[39],"caches\u2013but":[41],"these":[42],"cannot":[43],"work":[44],"optimally":[45],"without":[46],"help":[48],"from":[49],"programmer.":[51],"Unfortunately,":[52],"neither":[53],"structure":[55,82],"nor":[56],"cost":[58],"of":[59,64,83],"using":[60],"subsystem":[63],"a":[65],"computer":[66],"or":[67],"caches":[69,95],"on":[70,88],"CPUs":[71],"well":[73],"understood":[74],"by":[75,110],"programmers.":[77],"This":[78],"paper":[79],"explains":[80],"subsystems":[85],"in":[86],"use":[87],"modern":[89],"commodity":[90],"hardware,":[91],"illustrating":[92],"why":[93],"were":[96],"developed,":[97],"how":[98],"they":[99],"work,":[100],"what":[102],"should":[104],"do":[105],"to":[106],"achieve":[107],"optimal":[108],"performance":[109],"utilizing":[111],"them.":[112]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":10},{"year":2020,"cited_by_count":14},{"year":2019,"cited_by_count":11},{"year":2018,"cited_by_count":12},{"year":2017,"cited_by_count":13},{"year":2016,"cited_by_count":27},{"year":2015,"cited_by_count":22},{"year":2014,"cited_by_count":20},{"year":2013,"cited_by_count":37},{"year":2012,"cited_by_count":27}],"updated_date":"2026-11-12T12:28:57.059296","created_date":"2016-06-24T00:00:00"}
