{"id":"https://openalex.org/W2156201823","doi":null,"title":"A Design Evaluation of Strained Si-SiGe on Insulator (SSOI) Based Sub-50 nm nMOSFETs","display_name":"A Design Evaluation of Strained Si-SiGe on Insulator (SSOI) Based Sub-50 nm nMOSFETs","publication_year":2005,"publication_date":"2005-06-01","ids":{"openalex":"https://openalex.org/W2156201823","mag":"2156201823"},"language":"en","primary_location":{"id":"mag:2156201823","doi":null,"is_oa":false,"landing_page_url":"http://www.koreascience.or.kr/article/ArticleFullRecord.jsp?cn=E1STAN_2005_v5n2_136","pdf_url":null,"source":{"id":"https://openalex.org/S2482218150","display_name":"JSTS Journal of Semiconductor Technology and Science","issn_l":"1598-1657","issn":["1598-1657","2233-4866"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-c","kci-registered","poland-20","russia-white-list-4"],"host_organization":"https://openalex.org/P4366305964","host_organization_name":"Institute of Electronics Engineers of Korea","host_organization_lineage":["https://openalex.org/P4366305964"],"host_organization_lineage_names":["Institute of Electronics Engineers of Korea"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"JSTS Journal of Semiconductor Technology and Science","raw_type":null},"volume":null,"type":"article","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101618839","display_name":"Muhammad Imran Nawaz","orcid":"https://orcid.org/0000-0002-8387-9000","observed_orcids":["https://orcid.org/0000-0002-8387-9000"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Muhammad Nawaz","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0002-8387-9000","affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5059858621","display_name":"Mikael \u00d6stling","orcid":"https://orcid.org/0000-0002-5845-3032","observed_orcids":["https://orcid.org/0000-0002-5845-3032"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Mikael \u00d6stling","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0002-5845-3032","affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":"5","issue":"2","first_page":"136","last_page":"147"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.0005000000237487257,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11853","display_name":"Semiconductor materials and interfaces","score":0.0,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/n-mosfet","display_name":"nMOSFET","score":0.9179999828338623},{"id":"https://openalex.org/keywords/short-channel-effects","display_name":"short-channel effects","score":0.9810000061988831},{"id":"https://openalex.org/keywords/source-drain-extension","display_name":"source/drain extension","score":0.734000027179718},{"id":"https://openalex.org/keywords/threshold-voltage-shift","display_name":"threshold voltage shift","score":0.921999990940094},{"id":"https://openalex.org/keywords/subthreshold-swing","display_name":"subthreshold swing","score":0.9919999837875366},{"id":"https://openalex.org/keywords/transconductance","display_name":"transconductance","score":0.8759999871253967},{"id":"https://openalex.org/keywords/gate-length-scaling","display_name":"gate length scaling","score":0.6499999761581421},{"id":"https://openalex.org/keywords/junction-depth","display_name":"junction depth","score":0.593999981880188}],"concepts":[{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.8919164538383484},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.850786566734314},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.6371046304702759},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.5509167313575745},{"id":"https://openalex.org/C191952053","wikidata":"https://www.wikidata.org/wiki/Q15119237","display_name":"Dopant","level":3,"score":0.5138812065124512},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.5103632807731628},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.5037168860435486},{"id":"https://openalex.org/C103566474","wikidata":"https://www.wikidata.org/wiki/Q7632226","display_name":"Subthreshold slope","level":5,"score":0.4855618178844452},{"id":"https://openalex.org/C57863236","wikidata":"https://www.wikidata.org/wiki/Q1130571","display_name":"Doping","level":2,"score":0.4813550114631653},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.43186473846435547},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.4163277745246887},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.2854499816894531},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2584958076477051},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24570026993751526},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.23802068829536438},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.05663788318634033}],"mesh":[],"locations_count":1,"locations":[{"id":"mag:2156201823","doi":null,"is_oa":false,"landing_page_url":"http://www.koreascience.or.kr/article/ArticleFullRecord.jsp?cn=E1STAN_2005_v5n2_136","pdf_url":null,"source":{"id":"https://openalex.org/S2482218150","display_name":"JSTS Journal of Semiconductor Technology and Science","issn_l":"1598-1657","issn":["1598-1657","2233-4866"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-c","kci-registered","poland-20","russia-white-list-4"],"host_organization":"https://openalex.org/P4366305964","host_organization_name":"Institute of Electronics Engineers of Korea","host_organization_lineage":["https://openalex.org/P4366305964"],"host_organization_lineage_names":["Institute of Electronics Engineers of Korea"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"JSTS Journal of Semiconductor Technology and Science","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W62071570","https://openalex.org/W1512402821","https://openalex.org/W1555969351","https://openalex.org/W1576125294","https://openalex.org/W1661368752","https://openalex.org/W2004551297","https://openalex.org/W2013903301","https://openalex.org/W2109617856","https://openalex.org/W2129554307","https://openalex.org/W2136437454","https://openalex.org/W2167300113","https://openalex.org/W2170353603","https://openalex.org/W2536554518","https://openalex.org/W2540655259","https://openalex.org/W2543860562","https://openalex.org/W2546541429"],"related_works":["https://openalex.org/W2157926832","https://openalex.org/W1534431019","https://openalex.org/W2328092487","https://openalex.org/W1602879593","https://openalex.org/W2052708520","https://openalex.org/W7222801768","https://openalex.org/W2143712374","https://openalex.org/W2107341121","https://openalex.org/W1554539862","https://openalex.org/W1992923441"],"abstract_inverted_index":{"A":[0],"theoretical":[1],"design":[2],"evaluation":[3],"based":[4],"on":[5,13,88],"a":[6],"hydrodynamic":[7],"transport":[8],"simulation":[9,33],"of":[10,75,80,110,114],"strained":[11,39,139],"Si-SiGe":[12,40,140],"insulator":[14],"(SSOI)":[15],"type":[16,41,141],"nMOSFETs":[17,42],"is":[18,25,66,102,131],"reported.":[19],"Although,":[20],"the":[21,29,38,57,60,69,84,89,135],"net":[22],"performance":[23,91],"improvement":[24,58],"quite":[26],"limited":[27,67],"by":[28,68],"short":[30],"channel":[31],"effects,":[32],"results":[34,54],"clearly":[35],"show":[36,55],"that":[37,56],"are":[43],"well-suited":[44],"for":[45],"gate":[46,64,138],"lengths":[47],"down":[48],"to":[49,133],"20":[50],"nm.":[51],"\nSimulation":[53],"in":[59,83],"transconductance":[61],"with":[62,117,127],"decreasing":[63],"length":[65],"long-range":[70],"Coulomb":[71],"scattering.":[72],"An":[73,105],"influence":[74],"lateral":[76,125],"and":[77,100,112,123],"vertical":[78],"diffusion":[79,126],"shallow":[81,118],"dopants":[82],"source/drain":[85],"extension":[86],"regions":[87],"device":[90],"(i.e.,":[92],"threshold":[93],"voltage":[94],"shift,":[95],"subthreshold":[96],"slope,":[97],"current":[98],"drivability":[99],"transconductance)":[101],"quantitatively":[103],"assessed.":[104],"optimum":[106],"layer":[107],"thickness":[108],"(t_(si)":[109],"5":[111],"t_(sg)":[113],"10":[115],"nm)":[116,122],"junction":[119],"depth":[120],"(5-10":[121],"controlled":[124],"steep":[128],"doping":[129],"gradient":[130],"needed":[132],"realize":[134],"sub-50":[136],"nm":[137],"nMOSFETs.":[142]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-09-22T06:50:58.402377","created_date":"2016-06-24T00:00:00"}