{"id":"https://openalex.org/W2147275437","doi":"https://doi.org/10.1109/2.55501","title":"Synchronization algorithms for shared-memory multiprocessors","display_name":"Synchronization algorithms for shared-memory multiprocessors","publication_year":1990,"publication_date":"1990-06-01","ids":{"openalex":"https://openalex.org/W2147275437","doi":"https://doi.org/10.1109/2.55501","mag":"2147275437"},"language":"en","primary_location":{"id":"doi:10.1109/2.55501","doi":"https://doi.org/10.1109/2.55501","is_oa":false,"landing_page_url":"https://doi.org/10.1109/2.55501","pdf_url":null,"source":{"id":"https://openalex.org/S178916657","display_name":"Computer","issn_l":"0018-9162","issn":["0018-9162","1558-0814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-class-a","anvur-scientific","cwts-core","dongbi-b","jufo-2","norway-2","poland-70","russia-white-list-1","vabb-shw"],"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069110060","display_name":"Gary Graunke","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"G. Graunke","raw_affiliation_strings":["Sequent Comput. Syst., Beaverton, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sequent Comput. Syst., Beaverton, OR, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111871616","display_name":"S. Thakkar","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Thakkar","raw_affiliation_strings":["Sequent Comput. Syst., Beaverton, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sequent Comput. Syst., Beaverton, OR, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2995,"currency":"USD","value_usd":2995},"apc_paid":null,"fwci":12.0184,"has_fulltext":false,"cited_by_count":212,"citation_normalized_percentile":{"value":0.98598677,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":87,"max":99},"biblio":{"volume":"23","issue":"6","first_page":"60","last_page":"69"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.6011000275611877,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.6011000275611877,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.384799987077713,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12127","display_name":"Software System Performance and Reliability","score":0.0012000000569969416,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/synchronization-algorithms","display_name":"synchronization algorithms","score":0.8980000019073486},{"id":"https://openalex.org/keywords/shared-memory-multiprocessors","display_name":"shared-memory multiprocessors","score":0.9810000061988831},{"id":"https://openalex.org/keywords/lock-contention","display_name":"lock contention","score":0.7689999938011169},{"id":"https://openalex.org/keywords/hardware-monitors","display_name":"hardware monitors","score":0.6470000147819519},{"id":"https://openalex.org/keywords/multiprocessor-performance-evaluation","display_name":"multiprocessor performance evaluation","score":0.6909999847412109},{"id":"https://openalex.org/keywords/hardware-synchronization","display_name":"hardware synchronization","score":0.5490000247955322}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.896098256111145},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6656438112258911},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5618461966514587},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.4831482768058777},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4016859829425812},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0917712152004242},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/2.55501","doi":"https://doi.org/10.1109/2.55501","is_oa":false,"landing_page_url":"https://doi.org/10.1109/2.55501","pdf_url":null,"source":{"id":"https://openalex.org/S178916657","display_name":"Computer","issn_l":"0018-9162","issn":["0018-9162","1558-0814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-class-a","anvur-scientific","cwts-core","dongbi-b","jufo-2","norway-2","poland-70","russia-white-list-1","vabb-shw"],"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1487783453","https://openalex.org/W1555673550","https://openalex.org/W2069278684","https://openalex.org/W2092495200","https://openalex.org/W2103772475","https://openalex.org/W2123784733","https://openalex.org/W2166071597","https://openalex.org/W4243825971"],"related_works":["https://openalex.org/W2133883933","https://openalex.org/W7098996121","https://openalex.org/W7096007712","https://openalex.org/W7097039828","https://openalex.org/W4237172070","https://openalex.org/W3086872842","https://openalex.org/W2617927702","https://openalex.org/W171088060","https://openalex.org/W7098783747","https://openalex.org/W2127368689"],"abstract_inverted_index":{"A":[0],"performance":[1,95],"evaluation":[2],"of":[3,83,89,96,104],"the":[4,10,41,45,52,64,102,106,110],"Symmetry":[5,42,76],"multiprocessor":[6,43],"system":[7,112],"revealed":[8],"that":[9],"synchronization":[11,30,66],"mechanism":[12,67],"did":[13],"not":[14],"perform":[15],"well":[16],"for":[17,51,71],"highly":[18,72],"contested":[19,73],"locks,":[20],"like":[21],"those":[22],"found":[23],"in":[24],"certain":[25],"parallel":[26],"applications.":[27],"Several":[28],"software":[29],"mechanisms":[31,46,55],"were":[32,47],"developed":[33],"and":[34,80,86,109],"evaluated,":[35],"using":[36],"a":[37,81],"hardware":[38,65,90],"monitor,":[39],"on":[40],"system;":[44],"to":[48,63,68],"reduce":[49],"contention":[50],"lock.":[53],"The":[54,75,94],"remain":[56],"valuable":[57],"even":[58],"when":[59],"changes":[60],"are":[61,92],"made":[62],"improve":[69],"support":[70],"locks.":[74],"architecture":[77],"is":[78,99],"described,":[79],"number":[82],"lock":[84,98],"algorithms":[85],"their":[87],"use":[88],"resources":[91],"examined.":[93],"each":[97],"observed":[100],"from":[101],"perspective":[103],"both":[105],"program":[107],"itself":[108],"total":[111],"performance.":[113],">":[114]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":7},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":8},{"year":2012,"cited_by_count":3}],"updated_date":"2026-11-12T12:28:57.059296","created_date":"2016-06-24T00:00:00"}
