{"id":"https://openalex.org/W2141024358","doi":"https://doi.org/10.1155/2013/853510","title":"Frequency Optimization Objective during System Prototyping on Multi-FPGA Platform","display_name":"Frequency Optimization Objective during System Prototyping on Multi-FPGA Platform","publication_year":2013,"publication_date":"2013-01-01","ids":{"openalex":"https://openalex.org/W2141024358","doi":"https://doi.org/10.1155/2013/853510","mag":"2141024358"},"language":"en","primary_location":{"id":"doi:10.1155/2013/853510","doi":"https://doi.org/10.1155/2013/853510","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2013/853510","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2013/853510.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"listed_in":["cwts-core","doaj","norway-1","poland-20","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://downloads.hindawi.com/journals/ijrc/2013/853510.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019168974","display_name":"Mariem Turki","orcid":"https://orcid.org/0000-0003-2646-3962","observed_orcids":["https://orcid.org/0000-0003-2646-3962"]},"institutions":[{"id":"https://openalex.org/I4210159731","display_name":"LIP6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]},{"id":"https://openalex.org/I4405264447","display_name":"Universit\u00e9 Pierre-et-Marie-Curie","ror":"https://ror.org/01yvrd251","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081","https://openalex.org/I4405264447"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Mariem Turki","raw_affiliation_strings":["LIP6, UPMC, 75005 Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIP6, UPMC, 75005 Paris, France","institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I4405264447"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111822030","display_name":"Zied Marrakchi","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zied Marrakchi","raw_affiliation_strings":["FLEXRAS Technologies, 93521 Saint-Denis Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FLEXRAS Technologies, 93521 Saint-Denis Cedex, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108405631","display_name":"Habib Mehrez","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210159731","display_name":"LIP6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]},{"id":"https://openalex.org/I4405264447","display_name":"Universit\u00e9 Pierre-et-Marie-Curie","ror":"https://ror.org/01yvrd251","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081","https://openalex.org/I4405264447"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Habib Mehrez","raw_affiliation_strings":["LIP6, UPMC, 75005 Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIP6, UPMC, 75005 Paris, France","institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I4405264447"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026522015","display_name":"Mohamed Abid","orcid":"https://orcid.org/0000-0001-7409-292X","observed_orcids":["https://orcid.org/0000-0001-7409-292X"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Mohamed Abid","raw_affiliation_strings":["CES Lab, ENIS, 3038 Sfax, Tunisia","CES Lab, ENIS, Sfax, Tunisia#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CES Lab, ENIS, 3038 Sfax, Tunisia","institution_ids":[]},{"raw_affiliation_string":"CES Lab, ENIS, Sfax, Tunisia#TAB#","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5019168974"],"corresponding_institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I4405264447"],"apc_list":{"value":1000,"currency":"USD","value_usd":1000},"apc_paid":{"value":1000,"currency":"USD","value_usd":1000},"fwci":0.8653,"has_fulltext":true,"cited_by_count":8,"citation_normalized_percentile":{"value":0.74150682,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":97},"biblio":{"volume":"2013","issue":null,"first_page":"1","last_page":"12"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6523000001907349,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6523000001907349,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.323199987411499,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.011699999682605267,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/time-division-multiplexing","display_name":"time-division multiplexing","score":0.9160000085830688},{"id":"https://openalex.org/keywords/design-partitioning","display_name":"design partitioning","score":0.7670000195503235},{"id":"https://openalex.org/keywords/soc-design","display_name":"system-on-chip design","score":0.6110000014305115}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8698871731758118},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7908631563186646},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.7028643488883972},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5847672820091248},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.5245633125305176},{"id":"https://openalex.org/C2778940482","wikidata":"https://www.wikidata.org/wiki/Q7144753","display_name":"Pathfinder","level":2,"score":0.5230327844619751},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.4644719660282135},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.46285712718963623},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4529784917831421},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3298605978488922},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3270748257637024},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08285254240036011},{"id":"https://openalex.org/C161191863","wikidata":"https://www.wikidata.org/wiki/Q199655","display_name":"Library science","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1155/2013/853510","doi":"https://doi.org/10.1155/2013/853510","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2013/853510","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2013/853510.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"listed_in":["cwts-core","doaj","norway-1","poland-20","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},{"id":"pmh:oai:HAL:hal-01195952v1","doi":null,"is_oa":false,"landing_page_url":"https://hal.science/hal-01195952","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I4405252976","host_organization_name":"Centre pour la Communication Scientifique Directe","host_organization_lineage":["https://openalex.org/I4405252976"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Journal of Reconfigurable Computing, 2013, 2013, pp.853510. &#x27E8;10.1155/2013/853510&#x27E9;","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:doaj.org/article:cbe816dacc12496c9c15d257fc629bab","doi":null,"is_oa":false,"landing_page_url":"https://doaj.org/article/cbe816dacc12496c9c15d257fc629bab","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Journal of Reconfigurable Computing, Vol 2013 (2013)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1155/2013/853510","doi":"https://doi.org/10.1155/2013/853510","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2013/853510","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2013/853510.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"listed_in":["cwts-core","doaj","norway-1","poland-20","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.6773999929428101,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2141024358.pdf","grobid_xml":"https://content.openalex.org/works/W2141024358.grobid-xml"},"referenced_works_count":18,"referenced_works":["https://openalex.org/W32337268","https://openalex.org/W1968334894","https://openalex.org/W1992578807","https://openalex.org/W2032699516","https://openalex.org/W2054922540","https://openalex.org/W2109907925","https://openalex.org/W2121066557","https://openalex.org/W2133712953","https://openalex.org/W2141042966","https://openalex.org/W2144326053","https://openalex.org/W2148658001","https://openalex.org/W2154985610","https://openalex.org/W2196614274","https://openalex.org/W2275304190","https://openalex.org/W2482886256","https://openalex.org/W2752885492","https://openalex.org/W3145128584","https://openalex.org/W3147395157"],"related_works":["https://openalex.org/W2003193909","https://openalex.org/W32337268","https://openalex.org/W1998679126","https://openalex.org/W2895183628","https://openalex.org/W2261042505","https://openalex.org/W2772067181","https://openalex.org/W2558337280","https://openalex.org/W2542684176","https://openalex.org/W2075490772","https://openalex.org/W2079385330"],"abstract_inverted_index":{"Multi-FPGA":[0],"hardware":[1],"prototyping":[2,39,141],"is":[3,28,58,119,150],"becoming":[4],"increasingly":[5],"important":[6],"in":[7,54,96,138],"the":[8,17,20,23,31,38,49,56,61,81,85,100,112,124,134,147],"system":[9,50,142,148],"on":[10,19,37],"chip":[11],"design":[12,18,57],"cycle.":[13],"However,":[14],"after":[15],"partitioning":[16,82],"multi-FPGA":[21],"platform,":[22],"number":[24,32,62],"of":[25,33,63,73,140,155],"inter-FPGA":[26,64,87,125],"signals":[27,43,88,105],"greater":[29],"than":[30],"physical":[34],"connections":[35],"available":[36],"board.":[40],"Therefore,":[41],"these":[42],"should":[44],"be":[45,76],"time-multiplexed":[46],"which":[47,55],"lowers":[48],"frequency.":[51,143],"The":[52],"way":[53],"partitioned":[59],"affects":[60],"signals.":[65],"In":[66],"this":[67,145],"work,":[68],"we":[69],"propose":[70],"a":[71],"set":[72],"constraints":[74],"to":[75,98,121,132,158],"taken":[77],"into":[78],"account":[79],"during":[80],"task.":[83],"Then,":[84],"resulting":[86],"are":[89,106,130],"routed":[90,110],"with":[91,123],"an":[92,153],"iterative":[93],"routing":[94,114,126,160],"algorithm":[95,118],"order":[97],"obtain":[99,133],"best":[101],"multiplexing":[102],"ratio.":[103],"Indeed,":[104],"grouped":[107],"and":[108],"then":[109],"using":[111],"intra-FPGA":[113],"algorithm:":[115],"Pathfinder.":[116],"This":[117],"adapted":[120],"deal":[122],"problem.":[127],"Many":[128],"scenarios":[129],"proposed":[131],"most":[135],"optimized":[136],"results":[137],"terms":[139],"Using":[144],"technique,":[146],"frequency":[149],"improved":[151],"by":[152],"average":[154],"12.8%":[156],"compared":[157],"constructive":[159],"algorithm.":[161]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}
