{"id":"https://openalex.org/W2140928152","doi":"https://doi.org/10.1145/780731.780759","title":"Profiling tools for hardware/software partitioning of embedded applications","display_name":"Profiling tools for hardware/software partitioning of embedded applications","publication_year":2003,"publication_date":"2003-06-11","ids":{"openalex":"https://openalex.org/W2140928152","doi":"https://doi.org/10.1145/780731.780759","mag":"2140928152"},"language":"en","primary_location":{"id":"doi:10.1145/780731.780759","doi":"https://doi.org/10.1145/780731.780759","is_oa":false,"landing_page_url":"https://doi.org/10.1145/780731.780759","pdf_url":null,"source":{"id":"https://openalex.org/S148324379","display_name":"ACM SIGPLAN Notices","issn_l":"0362-1340","issn":["0362-1340","1558-1160"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM SIGPLAN Notices","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111603291","display_name":"Dinesh C. Suresh","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dinesh C. Suresh","raw_affiliation_strings":["University of California, Riverside, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033921328","display_name":"Walid A. Najjar","orcid":"https://orcid.org/0000-0001-6761-6801","observed_orcids":["https://orcid.org/0000-0001-6761-6801"]},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Walid A. Najjar","raw_affiliation_strings":["University of California, Riverside, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001290812","display_name":"Frank Vahid","orcid":"https://orcid.org/0000-0001-5416-0032","observed_orcids":["https://orcid.org/0000-0001-5416-0032"]},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Frank Vahid","raw_affiliation_strings":["University of California, Riverside, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012012492","display_name":"Jason R. Villarreal","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jason R. Villarreal","raw_affiliation_strings":["University of California, Riverside, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088031457","display_name":"Greg Stitt","orcid":"https://orcid.org/0000-0001-7159-7439","observed_orcids":["https://orcid.org/0000-0001-7159-7439"]},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Greg Stitt","raw_affiliation_strings":["University of California, Riverside, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I103635307"],"apc_list":null,"apc_paid":null,"fwci":10.1253,"has_fulltext":false,"cited_by_count":66,"citation_normalized_percentile":{"value":0.97799401,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":87,"max":97},"biblio":{"volume":"38","issue":"7","first_page":"189","last_page":"198"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.005200000014156103,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.0007999999797903001,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hardware-software-partitioning","display_name":"hardware/software partitioning","score":0.9259999990463257},{"id":"https://openalex.org/keywords/embedded-applications","display_name":"embedded applications","score":0.8180000185966492},{"id":"https://openalex.org/keywords/instruction-set-simulator","display_name":"instruction set simulator","score":0.7739999890327454},{"id":"https://openalex.org/keywords/gcc","display_name":"GCC","score":0.5759999752044678},{"id":"https://openalex.org/keywords/compile-time-optimization","display_name":"compile-time optimization","score":0.8870000243186951},{"id":"https://openalex.org/keywords/fpga","display_name":"FPGA","score":0.6930000185966492}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.88481605052948},{"id":"https://openalex.org/C187191949","wikidata":"https://www.wikidata.org/wiki/Q1138496","display_name":"Profiling (computer programming)","level":2,"score":0.8818367123603821},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6575030088424683},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6300467252731323},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5883681774139404},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5272599458694458},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5183206796646118},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.517885684967041},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47927922010421753},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4749612510204315},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4489884376525879},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.4166986048221588},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3061312735080719},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/780731.780759","doi":"https://doi.org/10.1145/780731.780759","is_oa":false,"landing_page_url":"https://doi.org/10.1145/780731.780759","pdf_url":null,"source":{"id":"https://openalex.org/S148324379","display_name":"ACM SIGPLAN Notices","issn_l":"0362-1340","issn":["0362-1340","1558-1160"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM SIGPLAN Notices","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.464.1515","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.464.1515","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.scarpaz.com/2100-papers/p189-suresh.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.74.3431","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.74.3431","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.ucr.edu/~vahid/pubs/lctes03_profile.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1519119415","https://openalex.org/W1948374296","https://openalex.org/W2008015263","https://openalex.org/W2016909415","https://openalex.org/W2031487553","https://openalex.org/W2038837571","https://openalex.org/W2047226031","https://openalex.org/W2072737419","https://openalex.org/W2117285153","https://openalex.org/W2139159264","https://openalex.org/W2140384194","https://openalex.org/W2161378339","https://openalex.org/W2163935347","https://openalex.org/W3147661780","https://openalex.org/W4231002400"],"related_works":["https://openalex.org/W2015629619","https://openalex.org/W7098629912","https://openalex.org/W2046968369","https://openalex.org/W2538097610","https://openalex.org/W4206627859","https://openalex.org/W2140156318","https://openalex.org/W7100884466","https://openalex.org/W2168644802","https://openalex.org/W2131575835","https://openalex.org/W2111581833"],"abstract_inverted_index":{"Loops":[0],"constitute":[1],"the":[2,11,60,78,83,86,90,98,104,114],"most":[3],"executed":[4],"segments":[5],"of":[6,22,67,85,100,106,129,140],"programs":[7],"and":[8,32,37,48,55,69,96],"therefore":[9,50,70],"are":[10,26],"best":[12],"candidates":[13],"for":[14],"hardware":[15],"software":[16],"partitioning.":[17,145],"We":[18,81,111],"present":[19],"a":[20,109,122,126,130],"set":[21,46],"profiling":[23,31,87],"tools":[24,142],"that":[25,117],"specifically":[27],"dedicated":[28],"to":[29,77,88],"loop":[30,38],"do":[33],"support":[34],"combined":[35],"function":[36],"profiling.":[39],"One":[40],"tool":[41],"relies":[42],"on":[43,64,103,125,133],"an":[44,134,137],"instruction":[45],"simulator":[47],"can":[49,118],"be":[51,119],"augmented":[52],"with":[53],"architecture":[54],"micro-architecture":[56],"features":[57],"simulation":[58],"while":[59],"other":[61],"is":[62],"based":[63],"compile-time":[65,101],"instrumentation":[66],"gcc":[68],"has":[71],"very":[72],"little":[73],"slow":[74],"down":[75],"compared":[76],"original":[79],"program":[80],"use":[82],"results":[84],"identify":[89],"compute":[91],"core":[92],"in":[93,108,143],"each":[94],"benchmark":[95],"study":[97,113],"effect":[99],"optimization":[102],"distribution":[105],"cores":[107],"program.":[110],"also":[112],"potential":[115],"speedup":[116],"achieved":[120],"using":[121],"configurable":[123],"system":[124],"chip,":[127],"consisting":[128],"CPU":[131],"embedded":[132],"FPGA,":[135],"as":[136],"example":[138],"application":[139],"these":[141],"hardware/software":[144]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":3}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-06-24T00:00:00"}