{"id":"https://openalex.org/W2139759719","doi":"https://doi.org/10.1109/t-c.1972.223451","title":"An Adaptive Replacement Algorithm for Paged-Memory Computer Systems","display_name":"An Adaptive Replacement Algorithm for Paged-Memory Computer Systems","publication_year":1972,"publication_date":"1972-10-01","ids":{"openalex":"https://openalex.org/W2139759719","doi":"https://doi.org/10.1109/t-c.1972.223451","mag":"2139759719"},"language":"en","primary_location":{"id":"doi:10.1109/t-c.1972.223451","doi":"https://doi.org/10.1109/t-c.1972.223451","is_oa":false,"landing_page_url":"https://doi.org/10.1109/t-c.1972.223451","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-3","norway-2","poland-140","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077104823","display_name":"John M. Thorington","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.M. Thorington","raw_affiliation_strings":["Bell Telephone Laboratories, Inc., Greensboro, NC, USA","Department of Electrical Engineering, Aubum University, Auburn, AL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bell Telephone Laboratories, Inc., Greensboro, NC, USA","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical Engineering, Aubum University, Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113723035","display_name":"J. David Irwin","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.D. Irwin","raw_affiliation_strings":["Department of Electrical Engineering, Aubum University, Auburn, AL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Aubum University, Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I82497590"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":2.0064,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.86624204,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":"C-21","issue":"10","first_page":"1053","last_page":"1061"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8378999829292297,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8378999829292297,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.025200000032782555,"subfield":{"id":"https://openalex.org/subfields/2614","display_name":"Theoretical Computer Science"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12288","display_name":"Optimization and Search Problems","score":0.025100000202655792,"subfield":{"id":"https://openalex.org/subfields/2614","display_name":"Theoretical Computer Science"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/page-replacement","display_name":"page replacement","score":0.7179999947547913},{"id":"https://openalex.org/keywords/memory-traces","display_name":"memory traces","score":0.6909999847412109},{"id":"https://openalex.org/keywords/probability-models","display_name":"probability models","score":0.6420000195503235},{"id":"https://openalex.org/keywords/hardware-implementation","display_name":"hardware implementation","score":0.6850000023841858},{"id":"https://openalex.org/keywords/virtual-memory","display_name":"virtual memory","score":0.5529999732971191}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8123208284378052},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5503548383712769},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5414078831672668},{"id":"https://openalex.org/C76399640","wikidata":"https://www.wikidata.org/wiki/Q189401","display_name":"Virtual memory","level":4,"score":0.5296680331230164},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5083183646202087},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.4596855342388153},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3639746904373169},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3526732325553894},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.22984552383422852},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1791064739227295},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12221208214759827},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11797240376472473},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/t-c.1972.223451","doi":"https://doi.org/10.1109/t-c.1972.223451","is_oa":false,"landing_page_url":"https://doi.org/10.1109/t-c.1972.223451","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-3","norway-2","poland-140","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1525683411","https://openalex.org/W1965754273","https://openalex.org/W1968193103","https://openalex.org/W1983593351","https://openalex.org/W1985264830","https://openalex.org/W1987225815","https://openalex.org/W2003551379","https://openalex.org/W2005533555","https://openalex.org/W2045929004","https://openalex.org/W2098728637","https://openalex.org/W2117537814","https://openalex.org/W2120649500","https://openalex.org/W2125353613","https://openalex.org/W2137651093","https://openalex.org/W2142098074","https://openalex.org/W2164155474","https://openalex.org/W2293221651","https://openalex.org/W2340185340","https://openalex.org/W2482987590","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2340185340","https://openalex.org/W91696134","https://openalex.org/W7120767150","https://openalex.org/W7100464628","https://openalex.org/W4239833226","https://openalex.org/W2143807648","https://openalex.org/W7101119171","https://openalex.org/W7097856835","https://openalex.org/W1524008744","https://openalex.org/W7098352795"],"abstract_inverted_index":{"A":[0,49],"general":[1],"class":[2],"of":[3,32,35,55,61],"adaptive":[4,37,56],"replacement":[5,57],"schemes":[6],"for":[7,51],"use":[8],"in":[9],"paged":[10],"memories":[11],"is":[12,19,66],"developed.":[13],"One":[14],"such":[15],"algorithm,":[16],"called":[17],"SIM,":[18],"simulated":[20],"using":[21,44],"a":[22],"probability":[23],"model":[24],"that":[25],"generates":[26],"memory":[27],"traces,":[28],"and":[29],"the":[30,33,45,62],"results":[31],"simulation":[34],"this":[36,53],"scheme":[38],"are":[39],"compared":[40],"with":[41,59],"those":[42],"obtained":[43],"best":[46],"nonlookahead":[47],"algorithms.":[48],"technique":[50],"implementing":[52],"type":[54],"algorithm":[58],"state":[60],"art":[63],"digital":[64],"hardware":[65],"also":[67],"presented.":[68]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2016-06-24T00:00:00"}
