{"id":"https://openalex.org/W2139288308","doi":"https://doi.org/10.1109/asap.1994.331809","title":"Analog VLSI arrays for morphological image processing","display_name":"Analog VLSI arrays for morphological image processing","publication_year":2002,"publication_date":"2002-12-17","ids":{"openalex":"https://openalex.org/W2139288308","doi":"https://doi.org/10.1109/asap.1994.331809","mag":"2139288308"},"language":"en","primary_location":{"id":"doi:10.1109/asap.1994.331809","doi":"https://doi.org/10.1109/asap.1994.331809","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.1994.331809","pdf_url":null,"source":{"id":"https://openalex.org/S7407086867","display_name":"IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of IEEE International Conference on Application Specific Array Processors (ASSAP'94)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111493410","display_name":"T.G. Morris","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T.G. Morris","raw_affiliation_strings":["Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013907683","display_name":"Stephen P. DeWeerth","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.P. DeWeerth","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":1.878,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.83866912,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"132","last_page":"142"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.4343000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.4343000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.32839998602867126,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12923","display_name":"Digital Image Processing Techniques","score":0.066600002348423,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/analog-vlsi","display_name":"analog VLSI","score":0.9259999990463257},{"id":"https://openalex.org/keywords/mathematical-morphology","display_name":"mathematical morphology","score":0.9789999723434448},{"id":"https://openalex.org/keywords/smart-pixels","display_name":"smart pixels","score":0.6570000052452087},{"id":"https://openalex.org/keywords/dilation","display_name":"dilation","score":0.8389999866485596},{"id":"https://openalex.org/keywords/edge-detection","display_name":"edge detection","score":0.9879999756813049},{"id":"https://openalex.org/keywords/current-mode-circuits","display_name":"current-mode circuits","score":0.9330000281333923},{"id":"https://openalex.org/keywords/real-time-image-processing","display_name":"real-time image processing","score":0.7749999761581421}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7945603132247925},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.7491479516029358},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6476730704307556},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.645878255367279},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.6401869058609009},{"id":"https://openalex.org/C2780757906","wikidata":"https://www.wikidata.org/wiki/Q5276676","display_name":"Dilation (metric space)","level":2,"score":0.6368627548217773},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.577643096446991},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5545024871826172},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.5304317474365234},{"id":"https://openalex.org/C185568154","wikidata":"https://www.wikidata.org/wiki/Q530242","display_name":"Mathematical morphology","level":4,"score":0.4808281660079956},{"id":"https://openalex.org/C104317675","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Digital image processing","level":4,"score":0.4657578766345978},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.46144479513168335},{"id":"https://openalex.org/C28525508","wikidata":"https://www.wikidata.org/wiki/Q4751054","display_name":"Analog image processing","level":5,"score":0.44762110710144043},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.4235665202140808},{"id":"https://openalex.org/C76935873","wikidata":"https://www.wikidata.org/wiki/Q209121","display_name":"Image sensor","level":2,"score":0.41184529662132263},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36798951029777527},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.36680835485458374},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3418680429458618},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.25268489122390747},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1973031759262085},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17612746357917786},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11076986789703369},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/asap.1994.331809","doi":"https://doi.org/10.1109/asap.1994.331809","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.1994.331809","pdf_url":null,"source":{"id":"https://openalex.org/S7407086867","display_name":"IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of IEEE International Conference on Application Specific Array Processors (ASSAP'94)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.30.4990","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.30.4990","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ee.gatech.edu/research/labs/ccss/publications/tonia/tonia2.ps","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1516966573","https://openalex.org/W1578671836","https://openalex.org/W1593939129","https://openalex.org/W1970518142","https://openalex.org/W1994530392","https://openalex.org/W2051385641","https://openalex.org/W2064619185","https://openalex.org/W2139016795","https://openalex.org/W2164741953"],"related_works":["https://openalex.org/W2172270979","https://openalex.org/W2160328837","https://openalex.org/W1516966573","https://openalex.org/W2051056409","https://openalex.org/W1867517792","https://openalex.org/W2110833446","https://openalex.org/W1896512998","https://openalex.org/W2027173669","https://openalex.org/W1821137916","https://openalex.org/W822057594"],"abstract_inverted_index":{"A":[0],"two-dimensional":[1],"analog":[2,60],"VLSI":[3],"array":[4,33,65],"that":[5,21],"performs":[6],"basic":[7],"morphological":[8,72],"image":[9,85,89],"processing":[10,44,64],"operations":[11],"is":[12,45],"presented.":[13],"The":[14,43,54,63,93],"system":[15,94],"uses":[16,66],"a":[17,98],"smart":[18,35],"pixel":[19],"approach":[20],"facilitates":[22],"the":[23,32,71,79,82,87,110],"parallel":[24,40],"computation":[25],"of":[26,34,109],"continuous":[27],"real-time":[28],"outputs.":[29],"Photodetectors":[30],"within":[31],"pixels":[36],"also":[37],"allow":[38],"for":[39],"optical":[41],"inputs.":[42],"performed":[46],"by":[47],"current-mode":[48],"circuitry":[49,112],"implemented":[50],"with":[51],"CMOS":[52,104],"technology.":[53],"signal":[55],"values":[56],"are":[57,113],"encoded":[58],"as":[59,75],"current":[61],"values.":[62],"local":[67],"communication":[68],"to":[69,90],"perform":[70],"operation":[73],"known":[74],"dilation,":[76],"and":[77,86],"outputs":[78],"difference":[80],"between":[81],"original":[83],"input":[84],"dilation":[88],"detect":[91],"edges.":[92],"was":[95],"fabricated":[96,111],"using":[97],"standard":[99],"2.0":[100],"/spl":[101],"mu/m":[102],"digital":[103],"process.":[105],"Example":[106],"output":[107],"data":[108],"presented.>":[114]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-10-28T10:33:24.094632","created_date":"2016-06-24T00:00:00"}