{"id":"https://openalex.org/W2138045261","doi":null,"title":"A low\u2013voltage fully balanced OTA with common mode feedforward and inherent common mode feedback detector","display_name":"A low\u2013voltage fully balanced OTA with common mode feedforward and inherent common mode feedback detector","publication_year":2002,"publication_date":"2002-01-01","ids":{"openalex":"https://openalex.org/W2138045261","mag":"2138045261"},"language":"en","primary_location":{"id":"mag:3147781563","doi":null,"is_oa":false,"landing_page_url":"http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000001471498","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"European Solid-State Circuits Conference (ESSCIRC)","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"European Solid-State Circuits Conference","raw_type":null},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012834813","display_name":"Ahmed Nader Mohieldin","orcid":"https://orcid.org/0000-0001-7500-4514","observed_orcids":["https://orcid.org/0000-0001-7500-4514"]},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ahmed N. Mohieldin","raw_affiliation_strings":["Texas A&M Univ., College station, TX, USA"],"raw_orcid":"https://orcid.org/0000-0001-7500-4514","affiliations":[{"raw_affiliation_string":"Texas A&M Univ., College station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019857998","display_name":"E. S\u00e1nchez\u2010Sinencio","orcid":"https://orcid.org/0000-0003-2116-1842","observed_orcids":["https://orcid.org/0000-0003-2116-1842"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"E. S\u00e1nchez\u2010Sinencio","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0003-2116-1842","affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5024571753","display_name":"Jos\u00e9 Silva-Mart\u00ednez","orcid":"https://orcid.org/0000-0002-7960-0177","observed_orcids":["https://orcid.org/0000-0002-7960-0177"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jos\u00e9 Silva-Mart\u00ednez","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0002-7960-0177","affiliations":[]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1268,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.72668686,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"191","last_page":"194"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.003599999938160181,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.00019999999494757503,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"operational transconductance amplifier","score":0.9520000219345093},{"id":"https://openalex.org/keywords/common-mode-feedback","display_name":"common-mode feedback","score":0.5099999904632568},{"id":"https://openalex.org/keywords/common-mode-rejection-ratio","display_name":"common-mode rejection ratio","score":0.6880000233650208},{"id":"https://openalex.org/keywords/low-voltage-operation","display_name":"low-voltage operation","score":0.7770000100135803},{"id":"https://openalex.org/keywords/pseudo-differential-amplifier","display_name":"pseudo-differential amplifier","score":0.593999981880188},{"id":"https://openalex.org/keywords/ota-c-filters","display_name":"OTA-C filters","score":0.9010000228881836},{"id":"https://openalex.org/keywords/linear-phase-filters","display_name":"linear phase filters","score":0.9229999780654907},{"id":"https://openalex.org/keywords/group-delay-ripple","display_name":"group delay ripple","score":0.8209999799728394},{"id":"https://openalex.org/keywords/cmos-analog-circuits","display_name":"CMOS analog circuits","score":0.6769999861717224}],"concepts":[{"id":"https://openalex.org/C189714311","wikidata":"https://www.wikidata.org/wiki/Q1530371","display_name":"Common-mode signal","level":4,"score":0.7084230184555054},{"id":"https://openalex.org/C38858127","wikidata":"https://www.wikidata.org/wiki/Q5441228","display_name":"Feed forward","level":2,"score":0.6979089975357056},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.6212570667266846},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5935018062591553},{"id":"https://openalex.org/C2779599953","wikidata":"https://www.wikidata.org/wiki/Q1776117","display_name":"Ripple","level":3,"score":0.5766355395317078},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.534080982208252},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5089774131774902},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5039624571800232},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.4815276265144348},{"id":"https://openalex.org/C102309569","wikidata":"https://www.wikidata.org/wiki/Q1244941","display_name":"Common-mode rejection ratio","level":5,"score":0.46389392018318176},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.446318656206131},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.4366764724254608},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.3712575137615204},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32321029901504517},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21064403653144836},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14650565385818481},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.137587308883667},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.12606528401374817},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"mag:3147781563","doi":null,"is_oa":false,"landing_page_url":"http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000001471498","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"European Solid-State Circuits Conference (ESSCIRC)","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"European Solid-State Circuits Conference","raw_type":null},{"id":"mag:2138045261","doi":null,"is_oa":false,"landing_page_url":"http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1471498","pdf_url":null,"source":{"id":"https://openalex.org/S4210191203","display_name":"European Solid-State Circuits Conference (ESSCIRC)","issn_l":"1930-8833","issn":["1930-8833","2643-1319"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"European Solid-State Circuits Conference","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1537617099","https://openalex.org/W2007746700","https://openalex.org/W2110522874","https://openalex.org/W2125320442","https://openalex.org/W2163783208"],"related_works":["https://openalex.org/W7096740645","https://openalex.org/W2105479071","https://openalex.org/W2542013113","https://openalex.org/W2168314281","https://openalex.org/W2533643492","https://openalex.org/W1571966037","https://openalex.org/W2136492465","https://openalex.org/W2071148070","https://openalex.org/W7119250703","https://openalex.org/W2160798004"],"abstract_inverted_index":{"A":[0],"pseudo":[1],"differential":[2],"fully":[3],"balanced":[4],"CMOS":[5],"OTA":[6,27],"architecture":[7],"with":[8],"inherent":[9],"common":[10],"mode":[11],"detection":[12],"is":[13,33,57,64,70],"proposed.":[14],"Through":[15],"judicious":[16],"arrangement,":[17],"the":[18,43,46,66],"common-mode":[19],"feedback":[20],"circuit":[21],"can":[22],"be":[23],"economically":[24],"implemented.":[25],"The":[26,59],"achieves":[28],"a":[29,49],"good":[30],"CMRR":[31],"and":[32],"suitable":[34],"for":[35],"low":[36],"voltage":[37],"operation.":[38],"As":[39],"an":[40],"example":[41],"of":[42,45],"applications":[44],"proposed":[47],"OTA,":[48],"100MHz":[50],"4th":[51],"order":[52],"linear":[53],"phase":[54],"OTA-C":[55],"filter":[56,67],"presented.":[58],"measured":[60],"group":[61],"delay":[62],"ripple":[63],"3%,":[65],"dynamic":[68],"range":[69],"45dB.":[71],"It":[72],"consumes":[73],"42.9mW":[74],"per":[75],"complex":[76],"poles.":[77]},"counts_by_year":[{"year":2016,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2026-10-31T12:09:11.096373","created_date":"2016-06-24T00:00:00"}