{"id":"https://openalex.org/W2132221164","doi":"https://doi.org/10.1109/iscas.2013.6572267","title":"A 5-bit 1.25GS/s 4.7mW delay-based pipelined ADC in 65nm CMOS","display_name":"A 5-bit 1.25GS/s 4.7mW delay-based pipelined ADC in 65nm CMOS","publication_year":2013,"publication_date":"2013-05-01","ids":{"openalex":"https://openalex.org/W2132221164","doi":"https://doi.org/10.1109/iscas.2013.6572267","mag":"2132221164"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2013.6572267","doi":"https://doi.org/10.1109/iscas.2013.6572267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6572267","pdf_url":null,"source":{"id":"https://openalex.org/S4393914142","display_name":"IEEE International Symposium on Circuits and Systems proceedings","issn_l":"0271-4302","issn":["0271-4302"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://dr.ntu.edu.sg/bitstream/10356/100932/1/A%205-Bit%201.25GS%20S%204.7mW%20Delay-Based%20Pipelined%20ADC%20in%2065nm%20CMOS.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004659449","display_name":"Ali Mesgarani","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I155093810","display_name":"University of Idaho","ror":"https://ror.org/03hbp5t65","country_code":"US","type":"education","lineage":["https://openalex.org/I155093810"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Mesgarani","raw_affiliation_strings":["Electrical and Computer Engineering, University of Idaho, Moscow, ID, USA","Electr. & Comput. Eng, Univ. of Idaho, Moscow, ID, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Idaho, Moscow, ID, USA","institution_ids":["https://openalex.org/I155093810"]},{"raw_affiliation_string":"Electr. & Comput. Eng, Univ. of Idaho, Moscow, ID, USA","institution_ids":["https://openalex.org/I155093810"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087906386","display_name":"Haipeng Fu","orcid":"https://orcid.org/0000-0002-9809-1830","observed_orcids":["https://orcid.org/0000-0002-9809-1830"]},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"H. P. Fu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":null,"display_name":"M. Yan","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"M. Yan","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034832155","display_name":"Ahmet Tekin","orcid":"https://orcid.org/0000-0001-8549-2582","observed_orcids":["https://orcid.org/0000-0001-8549-2582"]},"institutions":[{"id":"https://openalex.org/I4210127325","display_name":"Broadcom (United States)","ror":"https://ror.org/035gt5s03","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127325"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Tekin","raw_affiliation_strings":["Broadcom Corporations, Irvine, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Broadcom Corporations, Irvine, CA, USA","institution_ids":["https://openalex.org/I4210127325"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100432170","display_name":"Hao Yu","orcid":"https://orcid.org/0000-0001-8747-3203","observed_orcids":["https://orcid.org/0000-0001-8747-3203","https://orcid.org/0009-0000-0752-4251","https://orcid.org/0009-0000-7582-3325"]},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"H. Yu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035296415","display_name":"Suat Utku Ay","orcid":"https://orcid.org/0000-0001-7640-4253","observed_orcids":["https://orcid.org/0000-0001-7640-4253"]},"institutions":[{"id":"https://openalex.org/I155093810","display_name":"University of Idaho","ror":"https://ror.org/03hbp5t65","country_code":"US","type":"education","lineage":["https://openalex.org/I155093810"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. U. Ay","raw_affiliation_strings":["Electrical and Computer Engineering, University of Idaho, Moscow, ID, USA","Electr. & Comput. Eng, Univ. of Idaho, Moscow, ID, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of Idaho, Moscow, ID, USA","institution_ids":["https://openalex.org/I155093810"]},{"raw_affiliation_string":"Electr. & Comput. Eng, Univ. of Idaho, Moscow, ID, USA","institution_ids":["https://openalex.org/I155093810"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8153,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.61074561,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"2018","last_page":"2021"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.0005000000237487257,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.0003000000142492354,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/analog-to-digital-converter","display_name":"analog-to-digital converter","score":0.9610000252723694},{"id":"https://openalex.org/keywords/analog-delay-line","display_name":"analog delay line","score":0.9610000252723694},{"id":"https://openalex.org/keywords/time-interleaved-sampling","display_name":"time-interleaved sampling","score":0.9810000061988831},{"id":"https://openalex.org/keywords/low-power-adc","display_name":"low-power analog-to-digital converter","score":0.5770000219345093},{"id":"https://openalex.org/keywords/high-speed-adc","display_name":"high-speed ADC","score":0.9129999876022339},{"id":"https://openalex.org/keywords/65-nm-cmos","display_name":"65 nm CMOS","score":0.9390000104904175},{"id":"https://openalex.org/keywords/5-bit-adc","display_name":"5-bit ADC","score":0.7450000047683716}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7700628042221069},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.7211178541183472},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.618076741695404},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5758184194564819},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5184659361839294},{"id":"https://openalex.org/C206565188","wikidata":"https://www.wikidata.org/wiki/Q836482","display_name":"Sample and hold","level":3,"score":0.5072740912437439},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.49732211232185364},{"id":"https://openalex.org/C2777271169","wikidata":"https://www.wikidata.org/wiki/Q190169","display_name":"Analog-to-digital converter","level":3,"score":0.4780488610267639},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.446321964263916},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4422897398471832},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.43592262268066406},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.35019630193710327},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.34414201974868774},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3340832591056824},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.25277096033096313},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.10128483176231384},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/iscas.2013.6572267","doi":"https://doi.org/10.1109/iscas.2013.6572267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6572267","pdf_url":null,"source":{"id":"https://openalex.org/S4393914142","display_name":"IEEE International Symposium on Circuits and Systems proceedings","issn_l":"0271-4302","issn":["0271-4302"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"},{"id":"pmh:oai:dr.ntu.edu.sg:10356/100932","doi":null,"is_oa":true,"landing_page_url":"http://hdl.handle.net/10220/18235","pdf_url":"https://dr.ntu.edu.sg/bitstream/10356/100932/1/A%205-Bit%201.25GS%20S%204.7mW%20Delay-Based%20Pipelined%20ADC%20in%2065nm%20CMOS.pdf","source":{"id":"https://openalex.org/S4306402609","display_name":"DR-NTU (Nanyang Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I172675005","host_organization_name":"Nanyang Technological University","host_organization_lineage":["https://openalex.org/I172675005"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference Paper"},{"id":"mag:3191776594","doi":null,"is_oa":false,"landing_page_url":"https://jglobal.jst.go.jp/detail?JGLOBAL_ID=201302299091733943","pdf_url":null,"source":{"id":"https://openalex.org/S4393914142","display_name":"IEEE International Symposium on Circuits and Systems proceedings","issn_l":"0271-4302","issn":["0271-4302"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"International Symposium on Circuits and Systems","raw_type":null}],"best_oa_location":{"id":"pmh:oai:dr.ntu.edu.sg:10356/100932","doi":null,"is_oa":true,"landing_page_url":"http://hdl.handle.net/10220/18235","pdf_url":"https://dr.ntu.edu.sg/bitstream/10356/100932/1/A%205-Bit%201.25GS%20S%204.7mW%20Delay-Based%20Pipelined%20ADC%20in%2065nm%20CMOS.pdf","source":{"id":"https://openalex.org/S4306402609","display_name":"DR-NTU (Nanyang Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I172675005","host_organization_name":"Nanyang Technological University","host_organization_lineage":["https://openalex.org/I172675005"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference Paper"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320320766","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2132221164.pdf","grobid_xml":"https://content.openalex.org/works/W2132221164.grobid-xml"},"referenced_works_count":10,"referenced_works":["https://openalex.org/W1966012941","https://openalex.org/W1967304990","https://openalex.org/W2020287356","https://openalex.org/W2040644879","https://openalex.org/W2079575076","https://openalex.org/W2109190350","https://openalex.org/W2109289538","https://openalex.org/W2109512432","https://openalex.org/W2146488787","https://openalex.org/W6655768035"],"related_works":["https://openalex.org/W2152107533","https://openalex.org/W2586879371","https://openalex.org/W2114042879","https://openalex.org/W2042659121","https://openalex.org/W2811482481","https://openalex.org/W7097672296","https://openalex.org/W1994196928","https://openalex.org/W2053673971","https://openalex.org/W2055149163","https://openalex.org/W2792048012"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,90,99],"delay":[4,38,42],"based":[5],"pipeline":[6,31],"(DBP)":[7],"analog":[8,37,41],"to":[9,65],"digital":[10],"converter":[11],"(ADC)":[12],"suitable":[13],"for":[14],"high":[15],"speed":[16],"and":[17,23,25],"low":[18],"power":[19,102],"applications.":[20],"Active":[21],"sample":[22],"hold":[24],"residue":[26],"amplifier":[27],"used":[28],"in":[29,52,78],"conventional":[30],"ADCs":[32],"are":[33],"replaced":[34],"by":[35,46],"an":[36],"line.":[39],"The":[40],"line":[43],"is":[44,63,76],"implemented":[45],"time-interleaved":[47],"sampling":[48],"of":[49,55,93],"the":[50,56,86],"signal":[51],"each":[53],"stage":[54],"ADC.":[57],"A":[58,70],"novel":[59],"multi-phase":[60],"clock":[61],"generator":[62],"introduced":[64],"generate":[66],"ADC":[67,75,88],"timing":[68],"signals.":[69],"5-bit,":[71],"1.25":[72],"GS/s":[73],"DBP":[74],"designed":[77],"65nm":[79],"CMOS":[80],"process.":[81],"Post-layout":[82],"simulations":[83],"confirm":[84],"that":[85],"proposed":[87],"achieves":[89],"peak":[91],"SNDR":[92],"30.5dB":[94],"while":[95],"consuming":[96],"4.7mW":[97],"from":[98],"single":[100],"1.2V":[101],"supply.":[103]},"counts_by_year":[{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-06-24T00:00:00"}
