{"id":"https://openalex.org/W2129017435","doi":"https://doi.org/10.1109/tsm.2004.831937","title":"Evaluation of Transistor Property Variations Within Chips on 300-mm Wafers Using a New MOSFET Array Test Structure","display_name":"Evaluation of Transistor Property Variations Within Chips on 300-mm Wafers Using a New MOSFET Array Test Structure","publication_year":2004,"publication_date":"2004-08-01","ids":{"openalex":"https://openalex.org/W2129017435","doi":"https://doi.org/10.1109/tsm.2004.831937","mag":"2129017435"},"language":"en","primary_location":{"id":"doi:10.1109/tsm.2004.831937","doi":"https://doi.org/10.1109/tsm.2004.831937","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsm.2004.831937","pdf_url":null,"source":{"id":"https://openalex.org/S14676311","display_name":"IEEE Transactions on Semiconductor Manufacturing","issn_l":"0894-6507","issn":["0894-6507","1558-2345"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-1","norway-1","poland-70","russia-white-list-1"],"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Semiconductor Manufacturing","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077364322","display_name":"Naoki Izumi","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405276234","display_name":"Semiconductor Leading Edge Technologies, Inc (Japan)","ror":"https://ror.org/0523jgb37","country_code":"JP","type":"company","lineage":["https://openalex.org/I4405276234"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"N. Izumi","raw_affiliation_strings":["Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","Semicond. Leading Edge Technol. Inc., Ibaraki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]},{"raw_affiliation_string":"Semicond. Leading Edge Technol. Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046723891","display_name":"Hiroji Ozaki","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405276234","display_name":"Semiconductor Leading Edge Technologies, Inc (Japan)","ror":"https://ror.org/0523jgb37","country_code":"JP","type":"company","lineage":["https://openalex.org/I4405276234"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Ozaki","raw_affiliation_strings":["Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","Semicond. Leading Edge Technol. Inc., Ibaraki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]},{"raw_affiliation_string":"Semicond. Leading Edge Technol. Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110885623","display_name":"Y. Nakagawa","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405276234","display_name":"Semiconductor Leading Edge Technologies, Inc (Japan)","ror":"https://ror.org/0523jgb37","country_code":"JP","type":"company","lineage":["https://openalex.org/I4405276234"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Nakagawa","raw_affiliation_strings":["Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","Semicond. Leading Edge Technol. Inc., Ibaraki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]},{"raw_affiliation_string":"Semicond. Leading Edge Technol. Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113667570","display_name":"N. Kasai","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405276234","display_name":"Semiconductor Leading Edge Technologies, Inc (Japan)","ror":"https://ror.org/0523jgb37","country_code":"JP","type":"company","lineage":["https://openalex.org/I4405276234"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"N. Kasai","raw_affiliation_strings":["Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","Semicond. Leading Edge Technol. Inc., Ibaraki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]},{"raw_affiliation_string":"Semicond. Leading Edge Technol. Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080533135","display_name":"Tsunetoshi ARIKADO","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405276234","display_name":"Semiconductor Leading Edge Technologies, Inc (Japan)","ror":"https://ror.org/0523jgb37","country_code":"JP","type":"company","lineage":["https://openalex.org/I4405276234"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Arikado","raw_affiliation_strings":["Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","Semicond. Leading Edge Technol. Inc., Ibaraki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Leading Edge Technologies, Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]},{"raw_affiliation_string":"Semicond. Leading Edge Technol. Inc., Ibaraki, Japan","institution_ids":["https://openalex.org/I4405276234"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4405276234"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":0.9497,"has_fulltext":false,"cited_by_count":36,"citation_normalized_percentile":{"value":0.78056688,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":87,"max":97},"biblio":{"volume":"17","issue":"3","first_page":"248","last_page":"254"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.5756999850273132,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.5756999850273132,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.18299999833106995,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.06859999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/threshold-voltage-variation","display_name":"threshold voltage variation","score":0.8820000290870667},{"id":"https://openalex.org/keywords/300-mm-wafers","display_name":"300 mm wafers","score":0.9629999995231628},{"id":"https://openalex.org/keywords/standard-deviation","display_name":"standard deviation","score":0.4740000069141388},{"id":"https://openalex.org/keywords/parametric-tests","display_name":"parametric tests","score":0.8209999799728394}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8593326807022095},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.7783447504043579},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6635111570358276},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.6618048548698425},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.5994940400123596},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.542987048625946},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5398598909378052},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.47314679622650146},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.44827035069465637},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4467860460281372},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4439212679862976},{"id":"https://openalex.org/C129014197","wikidata":"https://www.wikidata.org/wiki/Q906544","display_name":"Power semiconductor device","level":3,"score":0.4258115887641907},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.36916714906692505},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3611823320388794}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tsm.2004.831937","doi":"https://doi.org/10.1109/tsm.2004.831937","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsm.2004.831937","pdf_url":null,"source":{"id":"https://openalex.org/S14676311","display_name":"IEEE Transactions on Semiconductor Manufacturing","issn_l":"0894-6507","issn":["0894-6507","1558-2345"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-1","norway-1","poland-70","russia-white-list-1"],"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Semiconductor Manufacturing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1485970398","https://openalex.org/W1490419416","https://openalex.org/W1604537105","https://openalex.org/W2114131053","https://openalex.org/W2114602166","https://openalex.org/W2122045896","https://openalex.org/W2142718365","https://openalex.org/W2533387447","https://openalex.org/W2536375260","https://openalex.org/W2542173156","https://openalex.org/W2544219538"],"related_works":["https://openalex.org/W2119776516","https://openalex.org/W2158469617","https://openalex.org/W2089505570","https://openalex.org/W2320628389","https://openalex.org/W2170439234","https://openalex.org/W2043958907","https://openalex.org/W2105291000","https://openalex.org/W2065515905","https://openalex.org/W2022138599","https://openalex.org/W2101909904"],"abstract_inverted_index":{"A":[0,59],"new":[1],"test":[2],"structure":[3],"has":[4],"been":[5],"designed":[6],"to":[7,86,89],"evaluate":[8],"fluctuations":[9],"of":[10,55],"transistor":[11],"properties,":[12],"both":[13],"within":[14],"a":[15,19,28],"chip":[16],"and":[17,32,73,80],"across":[18],"300-mm":[20],"wafer.":[21],"The":[22],"evaluation":[23],"system":[24],"was":[25,43,61],"established":[26],"with":[27,52],"conventional":[29],"parametric":[30],"tester":[31],"dc":[33],"power":[34],"supplies":[35],"suitable":[36],"for":[37],"application":[38],"on":[39],"production":[40],"lines.":[41],"It":[42],"observed":[44,63],"that":[45],"threshold":[46],"voltage":[47],"(V/sub":[48],"th/)":[49],"variations":[50],"increased":[51],"the":[53,56,65],"reduction":[54],"channel":[57],"area.":[58],"difference":[60],"also":[62],"in":[64],"standard":[66],"deviation":[67],"(/spl":[68],"sigma//sub":[69],"vt/)":[70],"between":[71],"NMOS":[72],"PMOS.":[74],"From":[75],"statistical":[76],"evaluations,":[77],"controlling":[78],"CDs":[79],"improving":[81],"rolloff":[82],"characteristics":[83],"were":[84],"found":[85],"be":[87],"important":[88],"reduce":[90],"V/sub":[91],"th/":[92],"variations.":[93]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}
