{"id":"https://openalex.org/W2128890914","doi":"https://doi.org/10.1109/tvlsi.2006.878477","title":"Placement for large-scale floating-gate field-programable analog arrays","display_name":"Placement for large-scale floating-gate field-programable analog arrays","publication_year":2006,"publication_date":"2006-08-01","ids":{"openalex":"https://openalex.org/W2128890914","doi":"https://doi.org/10.1109/tvlsi.2006.878477","mag":"2128890914"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2006.878477","doi":"https://doi.org/10.1109/tvlsi.2006.878477","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2006.878477","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-b","cwts-core","dongbi-c","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"volume":null,"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041703213","display_name":"Fa\u00edk Ba\u015fkaya","orcid":"https://orcid.org/0000-0001-6743-3992","observed_orcids":["https://orcid.org/0000-0001-6743-3992"]},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"F. Baskaya","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. Eng., Georgia, Inst. of Technol., Atlanta, GA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. Eng., Georgia, Inst. of Technol., Atlanta, GA#TAB#","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108226545","display_name":"S.M. Reddy","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Reddy","raw_affiliation_strings":["Department of Electrical Engineering, University of California, Los Angeles, CA, USA","Department of Electrical Engineering, University of California, Los Angeles, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"Department of Electrical Engineering, University of California, Los Angeles, CA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052950521","display_name":"Sung Kyu Lim","orcid":"https://orcid.org/0000-0002-2267-5282","observed_orcids":["https://orcid.org/0000-0002-2267-5282"]},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sung Kyu Lim","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA#TAB#","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033437141","display_name":"David V. Anderson","orcid":"https://orcid.org/0000-0002-8571-4613","observed_orcids":["https://orcid.org/0000-0002-8571-4613"]},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.V. Anderson","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA#TAB#","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":5.0591,"has_fulltext":false,"cited_by_count":32,"citation_normalized_percentile":{"value":0.9489056,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":88,"max":96},"biblio":{"volume":"14","issue":"8","first_page":"906","last_page":"910"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.0017000000225380063,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.0007999999797903001,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"field programmable analog array","score":0.9229999780654907},{"id":"https://openalex.org/keywords/floating-gate-devices","display_name":"floating-gate devices","score":0.8479999899864197},{"id":"https://openalex.org/keywords/placement-algorithms","display_name":"placement algorithms","score":0.5580000281333923},{"id":"https://openalex.org/keywords/interconnect-parasitics","display_name":"interconnect parasitics","score":0.7770000100135803}],"concepts":[{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.9726150035858154},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.7212603092193604},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6317174434661865},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5500437617301941},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5142685770988464},{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.5005440711975098},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.49448251724243164},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.48429742455482483},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.4736260771751404},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.42071813344955444},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.37681257724761963},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30498307943344116},{"id":"https://openalex.org/C90711627","wikidata":"https://www.wikidata.org/wiki/Q3742408","display_name":"Analog device","level":4,"score":0.29064100980758667},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2539920210838318},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23588326573371887},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.19004520773887634},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17048263549804688},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.13555055856704712},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1304391622543335},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12705263495445251},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08153313398361206},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2006.878477","doi":"https://doi.org/10.1109/tvlsi.2006.878477","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2006.878477","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-b","cwts-core","dongbi-c","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2038761235","https://openalex.org/W2105715355","https://openalex.org/W2106267865","https://openalex.org/W2111809466","https://openalex.org/W2116349445","https://openalex.org/W2120970098","https://openalex.org/W2132128385","https://openalex.org/W2134383396","https://openalex.org/W2134682148","https://openalex.org/W2139637699","https://openalex.org/W2143806010","https://openalex.org/W4212774754","https://openalex.org/W4242608849"],"related_works":["https://openalex.org/W7098166243","https://openalex.org/W2153003296","https://openalex.org/W2136829676","https://openalex.org/W2167887782","https://openalex.org/W2038078811","https://openalex.org/W2124419647","https://openalex.org/W2132128385","https://openalex.org/W2101485986","https://openalex.org/W2118249063","https://openalex.org/W2588302030"],"abstract_inverted_index":{"Modern":[0],"advances":[1],"in":[2,15,22,82],"reconfigurable":[3],"analog":[4,9,58,99],"technologies":[5],"are":[6,80],"allowing":[7],"field-programmable":[8],"arrays":[10],"(FPAAs)":[11],"to":[12,26,96],"dramatically":[13],"grow":[14],"size,":[16],"flexibility,":[17],"and":[18,76,112],"usefulness.":[19],"Our":[20,52,88],"goal":[21],"this":[23],"paper":[24],"is":[25,74],"develop":[27],"the":[28,40,43,67,103,118],"first":[29,56],"placement":[30,90],"algorithm":[31,55,91],"for":[32],"large-scale":[33],"floating-gate-based":[34],"FPAAs":[35],"with":[36],"a":[37,61,97],"focus":[38],"on":[39,46,108],"minimization":[41],"of":[42,63,70,84,102,120],"parasitic":[44],"effects":[45],"interconnects":[47],"under":[48],"various":[49],"device-related":[50],"constraints.":[51],"FPAA":[53,89,105],"clustering":[54],"groups":[57],"components":[59],"into":[60],"set":[62],"clusters":[64],"so":[65],"that":[66],"total":[68],"number":[69],"routing":[71,85,109],"switches":[72,86],"used":[73],"minimized":[75],"all":[77],"IO":[78],"paths":[79],"balanced":[81],"terms":[83],"used.":[87],"then":[92],"maps":[93],"each":[94],"cluster":[95],"computational":[98],"block":[100],"(CAB)":[101],"target":[104],"while":[106],"focusing":[107],"switch":[110],"usage":[111],"balance":[113],"again.":[114],"Experimental":[115],"results":[116],"demonstrate":[117],"effectiveness":[119],"our":[121],"approach":[122]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-10-16T09:59:22.235173","created_date":"2016-06-24T00:00:00"}