{"id":"https://openalex.org/W2124007645","doi":"https://doi.org/10.1109/tcad.2010.2042882","title":"Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings","display_name":"Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings","publication_year":2010,"publication_date":"2010-03-24","ids":{"openalex":"https://openalex.org/W2124007645","doi":"https://doi.org/10.1109/tcad.2010.2042882","mag":"2124007645"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2042882","doi":"https://doi.org/10.1109/tcad.2010.2042882","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2042882","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012132305","display_name":"Tejas K. Jhaveri","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I65376102","display_name":"PDF Solutions (United States)","ror":"https://ror.org/007737841","country_code":"US","type":"company","lineage":["https://openalex.org/I65376102"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tejas Jhaveri","raw_affiliation_strings":["PDF Solutions, Inc.orporated, Pittsburgh, PA, USA","PDF Solutions, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"PDF Solutions, Inc.orporated, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I65376102"]},{"raw_affiliation_string":"PDF Solutions, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I65376102"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056744331","display_name":"Vyacheslav V. Rovner","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vyacheslav Rovner","raw_affiliation_strings":["PDF Solutions and Carnegie Mellon University, Pittsburgh, PA, USA","PDF Solutions, Carnegie Mellon Univ., Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"PDF Solutions and Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"PDF Solutions, Carnegie Mellon Univ., Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073775409","display_name":"Lars W. Liebmann","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lars Liebmann","raw_affiliation_strings":["Semiconductor Research and Development Center, IBM Microelectronics, Hopewell Junction, NY, USA","Semicond. R&D Center, IBM Microelectron., Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Research and Development Center, IBM Microelectronics, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]},{"raw_affiliation_string":"Semicond. R&D Center, IBM Microelectron., Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033242808","display_name":"Larry Pileggi","orcid":"https://orcid.org/0000-0002-8605-8240","observed_orcids":["https://orcid.org/0000-0002-8605-8240"]},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Larry Pileggi","raw_affiliation_strings":["Carnegie Mellon University, Pittsburgh, PA, USA","Carnegie-Mellon University, Pittsburgh, Pa., USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Carnegie-Mellon University, Pittsburgh, Pa., USA#TAB#","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008759589","display_name":"Andrzej J. Strojwas","orcid":"https://orcid.org/0000-0001-9549-0302","observed_orcids":["https://orcid.org/0000-0001-9549-0302"]},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrzej J. Strojwas","raw_affiliation_strings":["Carnegie Mellon University, Pittsburgh, PA, USA","Carnegie-Mellon University, Pittsburgh, Pa., USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Carnegie-Mellon University, Pittsburgh, Pa., USA#TAB#","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011534733","display_name":"Jason D. Hibbeler","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jason D. Hibbeler","raw_affiliation_strings":["Electronic Design Automation Organization, IBM, Williston, VT, USA","IBM, Electron. Design Autom. Organ., Williston, VT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronic Design Automation Organization, IBM, Williston, VT, USA","institution_ids":["https://openalex.org/I1341412227"]},{"raw_affiliation_string":"IBM, Electron. Design Autom. Organ., Williston, VT, USA","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":10.0475,"has_fulltext":false,"cited_by_count":98,"citation_normalized_percentile":{"value":0.98485546,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":95,"max":100},"biblio":{"volume":"29","issue":"4","first_page":"509","last_page":"527"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.8041999936103821,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.8041999936103821,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.1460999995470047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.020099999383091927,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/co-optimization","display_name":"co-optimization","score":0.6800000071525574},{"id":"https://openalex.org/keywords/layout-templates","display_name":"layout templates","score":0.6639999747276306},{"id":"https://openalex.org/keywords/lithography","display_name":"lithography","score":0.675000011920929},{"id":"https://openalex.org/keywords/optical-proximity-correction","display_name":"optical proximity correction","score":0.9139999747276306},{"id":"https://openalex.org/keywords/ip-core","display_name":"IP core","score":0.8529999852180481}],"concepts":[{"id":"https://openalex.org/C204223013","wikidata":"https://www.wikidata.org/wiki/Q133036","display_name":"Lithography","level":2,"score":0.6398845911026001},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6354241967201233},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5767680406570435},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5400816202163696},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.506852924823761},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4884985685348511},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4854905903339386},{"id":"https://openalex.org/C206891323","wikidata":"https://www.wikidata.org/wiki/Q178655","display_name":"Moore's law","level":2,"score":0.45279985666275024},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.44709721207618713},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.41305792331695557},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4028513431549072},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.38059502840042114},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.30844488739967346},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23290425539016724},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1827433705329895},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.15251010656356812},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2010.2042882","doi":"https://doi.org/10.1109/tcad.2010.2042882","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2042882","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.7207000255584717}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":47,"referenced_works":["https://openalex.org/W1594489858","https://openalex.org/W1968434781","https://openalex.org/W1970034696","https://openalex.org/W1976959730","https://openalex.org/W1977237480","https://openalex.org/W1983210152","https://openalex.org/W1984776528","https://openalex.org/W1986697603","https://openalex.org/W1989315012","https://openalex.org/W2016669084","https://openalex.org/W2025074164","https://openalex.org/W2025516544","https://openalex.org/W2040707135","https://openalex.org/W2041600236","https://openalex.org/W2046045084","https://openalex.org/W2056892208","https://openalex.org/W2062593286","https://openalex.org/W2064576566","https://openalex.org/W2078551702","https://openalex.org/W2080953538","https://openalex.org/W2088294739","https://openalex.org/W2088876343","https://openalex.org/W2099658147","https://openalex.org/W2100344939","https://openalex.org/W2107088307","https://openalex.org/W2112519943","https://openalex.org/W2116625560","https://openalex.org/W2120898945","https://openalex.org/W2125952738","https://openalex.org/W2132729131","https://openalex.org/W2138876803","https://openalex.org/W2146322716","https://openalex.org/W2148115459","https://openalex.org/W2155731457","https://openalex.org/W2159868107","https://openalex.org/W2162852303","https://openalex.org/W2174227681","https://openalex.org/W2257145360","https://openalex.org/W2341432898","https://openalex.org/W2493581502","https://openalex.org/W2525935982","https://openalex.org/W4255881788","https://openalex.org/W4285719527","https://openalex.org/W6644535745","https://openalex.org/W6654546935","https://openalex.org/W6660964161","https://openalex.org/W6727217627"],"related_works":["https://openalex.org/W2060226542","https://openalex.org/W2016669084","https://openalex.org/W2016808412","https://openalex.org/W7055968364","https://openalex.org/W7098210961","https://openalex.org/W1988188126","https://openalex.org/W1985273110","https://openalex.org/W5532900","https://openalex.org/W2020646752","https://openalex.org/W2059147047"],"abstract_inverted_index":{"The":[0,27],"financial":[1],"backbone":[2],"of":[3,14,94,131,138],"the":[4,11,38,44,51,68,101,121],"semiconductor":[5],"industry":[6],"is":[7,80],"based":[8,75,133],"on":[9,77,134],"doubling":[10],"functional":[12,86],"density":[13,40,53],"integrated":[15],"circuits":[16],"every":[17],"two":[18],"years":[19],"at":[20],"fixed":[21],"wafer":[22],"costs":[23],"and":[24,73,88,153],"die":[25],"yields.":[26],"increasing":[28],"demands":[29],"for":[30,156,168],"'computational'":[31],"rather":[32],"than":[33],"'physical'":[34],"lithography":[35,154],"to":[36,49,84,100,127,189],"achieve":[37],"aggressive":[39],"targets,":[41],"along":[42,161],"with":[43,162,175],"complex":[45,98],"device-engineering":[46],"solutions":[47],"needed":[48],"maintain":[50],"power":[52],"objectives,":[54],"have":[55],"caused":[56],"a":[57,91,112,128,135,176],"rapid":[58],"escalation":[59],"in":[60],"systematic":[61],"yield":[62],"limiters":[63],"that":[64,96,111,182],"threaten":[65],"scaling.":[66],"Specifically,":[67],"traditional":[69],"contract":[70],"between":[71],"design":[72,78,104,125,166],"manufacturing":[74],"solely":[76],"rules":[79,126],"no":[81],"longer":[82],"sufficient":[83],"guarantee":[85],"silicon":[87],"instead":[89],"requires":[90],"convoluted":[92],"set":[93,137],"restrictions":[95],"force":[97],"modifications":[99],"already":[102],"costly":[103],"flows.":[105],"In":[106],"this":[107,146,183],"paper,":[108],"we":[109,179],"claim":[110],"far":[113],"superior":[114],"result":[115],"can":[116,148],"be":[117],"achieved":[118],"by":[119],"moving":[120],"design-to-manufacturing":[122],"interface":[123],"from":[124],"higher":[129],"level":[130],"abstraction":[132],"defined":[136],"pre-characterized":[139],"layout":[140],"templates.":[141],"We":[142],"will":[143,180,185],"demonstrate":[144],"how":[145],"methodology":[147,184],"simplify":[149],"optical":[150],"proximity":[151],"correction":[152],"processes":[155],"sub-32":[157,190],"nm":[158,191],"technology":[159,192],"nodes,":[160],"various":[163],"digital":[164],"block":[165],"examples":[167],"synthesized":[169],"intellectual":[170],"property":[171],"(IP)":[172],"cores.":[173],"Furthermore,":[174],"cost-per-good-die":[177],"analysis":[178],"show":[181],"extend":[186],"economical":[187],"scaling":[188],"nodes.":[193]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":9},{"year":2015,"cited_by_count":17},{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":9},{"year":2012,"cited_by_count":11}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}
