{"id":"https://openalex.org/W2115809483","doi":"https://doi.org/10.1109/jssc.2004.827806","title":"A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration","display_name":"A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration","publication_year":2004,"publication_date":"2004-06-01","ids":{"openalex":"https://openalex.org/W2115809483","doi":"https://doi.org/10.1109/jssc.2004.827806","mag":"2115809483"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2004.827806","doi":"https://doi.org/10.1109/jssc.2004.827806","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2004.827806","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-a","jufo-3","norway-2","poland-140","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091297210","display_name":"Changsik Yoo","orcid":"https://orcid.org/0000-0001-7945-5400","observed_orcids":["https://orcid.org/0000-0001-7945-5400"]},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Changsik Yoo","raw_affiliation_strings":["Division of Electrical and Computer Engineering, Hanyang University, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Division of Electrical and Computer Engineering, Hanyang University, Seoul, South Korea","institution_ids":["https://openalex.org/I4575257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112306635","display_name":"Kye-Hyun Kyung","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405259277","display_name":"Samsung Electronics (South Korea)","ror":"https://ror.org/020m7t761","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4405259277"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kye-Hyun Kyung","raw_affiliation_strings":["DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea","institution_ids":["https://openalex.org/I4405259277"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108381269","display_name":"Kyu-Nam Lim","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405259277","display_name":"Samsung Electronics (South Korea)","ror":"https://ror.org/020m7t761","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4405259277"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyunam Lim","raw_affiliation_strings":["DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea","institution_ids":["https://openalex.org/I4405259277"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111904078","display_name":"Hi-Choon Lee","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405259277","display_name":"Samsung Electronics (South Korea)","ror":"https://ror.org/020m7t761","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4405259277"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hi-Choon Lee","raw_affiliation_strings":["DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea","institution_ids":["https://openalex.org/I4405259277"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110212600","display_name":"J.-W. Chai","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405259277","display_name":"Samsung Electronics (South Korea)","ror":"https://ror.org/020m7t761","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4405259277"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Joon-Wan Chai","raw_affiliation_strings":["DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea","institution_ids":["https://openalex.org/I4405259277"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014241576","display_name":"Nak-Won Heo","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405259277","display_name":"Samsung Electronics (South Korea)","ror":"https://ror.org/020m7t761","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4405259277"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Nak-Won Heo","raw_affiliation_strings":["DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea","institution_ids":["https://openalex.org/I4405259277"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115589998","display_name":"Dong\u2010Jin Lee","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405259277","display_name":"Samsung Electronics (South Korea)","ror":"https://ror.org/020m7t761","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4405259277"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dong-Jin Lee","raw_affiliation_strings":["DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea","institution_ids":["https://openalex.org/I4405259277"]}]},{"author_position":"last","author":{"id":null,"display_name":"Chang-Hyun Kim","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405259277","display_name":"Samsung Electronics (South Korea)","ror":"https://ror.org/020m7t761","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4405259277"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Chang-Hyun Kim","raw_affiliation_strings":["DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DRAM Design 3, Samsung Electronics Limited, Kyunggi, South Korea","institution_ids":["https://openalex.org/I4405259277"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":2.8492,"has_fulltext":false,"cited_by_count":35,"citation_normalized_percentile":{"value":0.90242914,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":88,"max":97},"biblio":{"volume":"39","issue":"6","first_page":"941","last_page":"951"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9082000255584717,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9082000255584717,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.053700000047683716,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.009999999776482582,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-voltage-operation","display_name":"low-voltage operation","score":0.6480000019073486},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"signal integrity","score":0.7950000166893005},{"id":"https://openalex.org/keywords/high-speed-data-transmission","display_name":"high-speed data transmission","score":0.7139999866485596}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7454774379730225},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.638953447341919},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.56681227684021},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.5205541849136353},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.5119372606277466},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46843868494033813},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4178304672241211},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.41554513573646545},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3812384605407715},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3660238981246948},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.34300875663757324},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.311090350151062},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.21476119756698608},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.10487338900566101},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07921972870826721}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2004.827806","doi":"https://doi.org/10.1109/jssc.2004.827806","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2004.827806","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-a","jufo-3","norway-2","poland-140","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.6773999929428101,"display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1498916818","https://openalex.org/W1576450352","https://openalex.org/W2106389732","https://openalex.org/W2120605288","https://openalex.org/W2143738690","https://openalex.org/W2187435068","https://openalex.org/W2788122310"],"related_works":["https://openalex.org/W1580581276","https://openalex.org/W3022880601","https://openalex.org/W4244635463","https://openalex.org/W2127729681","https://openalex.org/W2243540610","https://openalex.org/W4396877787","https://openalex.org/W2143738690","https://openalex.org/W2020705107","https://openalex.org/W2015184411","https://openalex.org/W2129448581"],"abstract_inverted_index":{"A":[0],"512-Mb":[1],"DDR-II":[2],"SDRAM":[3],"has":[4],"achieved":[5],"700-Mb/s/pin":[6],"operation":[7],"at":[8],"1.8-V":[9],"supply":[10,19],"voltage":[11,20],"with":[12,64],"0.12-/spl":[13],"mu/m":[14],"DRAM":[15],"process.":[16],"The":[17],"low":[18],"presents":[21],"challenges":[22],"in":[23],"high":[24,56],"data":[25,43,51,57],"rate":[26,58],"and":[27,40,67],"signal":[28,75],"integrity.":[29],"Circuit":[30],"techniques":[31],"such":[32],"as":[33],"hierarchical":[34],"I/O":[35],"lines,":[36],"local":[37],"sense":[38],"amplifier,":[39],"fully":[41],"shielded":[42],"lines":[44],"without":[45],"area":[46],"penalty":[47],"have":[48],"provided":[49],"improved":[50],"access":[52],"time":[53],"and,":[54],"thus,":[55],"can":[59],"be":[60],"achieved.":[61],"Off-chip":[62],"driver":[63],"calibrated":[65],"strength":[66],"on-die":[68],"termination":[69],"are":[70],"utilized":[71],"to":[72],"give":[73],"sufficient":[74],"integrity":[76],"for":[77],"over":[78],"533-Mb/s/pin":[79],"operation.":[80]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":3}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-06-24T00:00:00"}