{"id":"https://openalex.org/W2111664042","doi":"https://doi.org/10.1109/tc.2009.33","title":"On the Characterization and Optimization of On-Chip Cache Reliability against Soft Errors","display_name":"On the Characterization and Optimization of On-Chip Cache Reliability against Soft Errors","publication_year":2009,"publication_date":"2009-02-26","ids":{"openalex":"https://openalex.org/W2111664042","doi":"https://doi.org/10.1109/tc.2009.33","mag":"2111664042"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2009.33","doi":"https://doi.org/10.1109/tc.2009.33","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2009.33","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-3","norway-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"volume":null,"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100328354","display_name":"Shuai Wang","orcid":"https://orcid.org/0000-0003-3946-4497","observed_orcids":["https://orcid.org/0000-0003-3946-4497"]},"institutions":[{"id":"https://openalex.org/I118118575","display_name":"New Jersey Institute of Technology","ror":"https://ror.org/05e74xb87","country_code":"US","type":"education","lineage":["https://openalex.org/I118118575"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shuai Wang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA","Dept. of Electr. & Comput. Eng., Univ. Heights, Newark, NJ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA","institution_ids":["https://openalex.org/I118118575"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. Heights, Newark, NJ, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078785836","display_name":"Jie S. Hu","orcid":"https://orcid.org/0000-0002-7598-5153","observed_orcids":["https://orcid.org/0000-0002-7598-5153"]},"institutions":[{"id":"https://openalex.org/I118118575","display_name":"New Jersey Institute of Technology","ror":"https://ror.org/05e74xb87","country_code":"US","type":"education","lineage":["https://openalex.org/I118118575"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jie Hu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA","Dept. of Electr. & Comput. Eng., Univ. Heights, Newark, NJ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA","institution_ids":["https://openalex.org/I118118575"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. Heights, Newark, NJ, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076762145","display_name":"Sotirios G. Ziavras","orcid":"https://orcid.org/0000-0002-3764-1528","observed_orcids":["https://orcid.org/0000-0002-3764-1528"]},"institutions":[{"id":"https://openalex.org/I118118575","display_name":"New Jersey Institute of Technology","ror":"https://ror.org/05e74xb87","country_code":"US","type":"education","lineage":["https://openalex.org/I118118575"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.G. Ziavras","raw_affiliation_strings":["Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA","Dept. of Electr. & Comput. Eng., Univ. Heights, Newark, NJ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA","institution_ids":["https://openalex.org/I118118575"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. Heights, Newark, NJ, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I118118575"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":2.6295,"has_fulltext":false,"cited_by_count":54,"citation_normalized_percentile":{"value":0.89511557,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":99},"biblio":{"volume":"58","issue":"9","first_page":"1171","last_page":"1184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.0013000000035390258,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.000699999975040555,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/soft-errors","display_name":"soft errors","score":0.9129999876022339},{"id":"https://openalex.org/keywords/on-chip-cache-memory","display_name":"on-chip cache memory","score":0.9539999961853027},{"id":"https://openalex.org/keywords/cache-reliability","display_name":"cache reliability","score":0.8059999942779541},{"id":"https://openalex.org/keywords/lifetime-modeling","display_name":"lifetime modeling","score":0.5490000247955322},{"id":"https://openalex.org/keywords/instruction-cache","display_name":"instruction cache","score":0.597000002861023},{"id":"https://openalex.org/keywords/data-cache","display_name":"data cache","score":0.8450000286102295},{"id":"https://openalex.org/keywords/microprocessor-reliability","display_name":"microprocessor reliability","score":0.6660000085830688}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8178374767303467},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7882850766181946},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.5676590204238892},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.5260883569717407},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4929673671722412},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.48625361919403076},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4620020091533661},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.4606030583381653},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4468114972114563},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.399723082780838},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37212878465652466},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1051238477230072},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.08067914843559265},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tc.2009.33","doi":"https://doi.org/10.1109/tc.2009.33","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2009.33","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-3","norway-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.228.6031","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.6031","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://web.njit.edu/%7Eziavras/char.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"sustainable_development_goals_aurora":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":47,"referenced_works":["https://openalex.org/W1859275911","https://openalex.org/W1967835393","https://openalex.org/W2042694839","https://openalex.org/W2072051680","https://openalex.org/W2077249989","https://openalex.org/W2088706067","https://openalex.org/W2105145734","https://openalex.org/W2110999128","https://openalex.org/W2111502420","https://openalex.org/W2115157620","https://openalex.org/W2115194678","https://openalex.org/W2117747343","https://openalex.org/W2119306965","https://openalex.org/W2121440282","https://openalex.org/W2127178251","https://openalex.org/W2127745296","https://openalex.org/W2127859298","https://openalex.org/W2128252715","https://openalex.org/W2132991823","https://openalex.org/W2134309495","https://openalex.org/W2136849670","https://openalex.org/W2138777150","https://openalex.org/W2141212616","https://openalex.org/W2144512449","https://openalex.org/W2150011671","https://openalex.org/W2151612544","https://openalex.org/W2152452249","https://openalex.org/W2152870111","https://openalex.org/W2153456949","https://openalex.org/W2154614859","https://openalex.org/W2157447136","https://openalex.org/W2157468334","https://openalex.org/W2164474450","https://openalex.org/W2168116639","https://openalex.org/W2169213530","https://openalex.org/W2171065098","https://openalex.org/W3008392966","https://openalex.org/W4231535434","https://openalex.org/W4232112461","https://openalex.org/W4232837724","https://openalex.org/W4234582951","https://openalex.org/W4244273388","https://openalex.org/W4246879687","https://openalex.org/W4249144718","https://openalex.org/W4250303214","https://openalex.org/W4252472210","https://openalex.org/W4253202538"],"related_works":["https://openalex.org/W2031173804","https://openalex.org/W3085471909","https://openalex.org/W2114386333","https://openalex.org/W2363769136","https://openalex.org/W2324141783","https://openalex.org/W2148571123","https://openalex.org/W2012518269","https://openalex.org/W2167303720","https://openalex.org/W2061075966","https://openalex.org/W57688818"],"abstract_inverted_index":{"Soft":[0],"errors":[1,96],"induced":[2],"by":[3,157],"energetic":[4],"particle":[5],"strikes":[6],"in":[7,16,37,49,86,129],"on-chip":[8,38,108],"cache":[9,39,84,92,109,142],"memories":[10],"have":[11,24],"become":[12],"an":[13],"increasing":[14],"challenge":[15],"designing":[17],"new":[18,71,120],"generation":[19],"reliable":[20,107],"microprocessors.":[21],"Previous":[22],"efforts":[23],"exploited":[25],"information":[26,35],"redundancy":[27],"via":[28],"parity/ECC":[29],"codings":[30],"or":[31],"cacheline":[32],"duplication":[33],"for":[34,73,104,123],"integrity":[36],"memories.":[40],"Due":[41],"to":[42,88,94,102,170],"various":[43,50,148],"performance,":[44],"area/size,":[45],"and":[46,63,77,125,133],"energy":[47],"constraints":[48],"target":[51],"systems,":[52],"many":[53],"existing":[54],"unoptimized":[55],"protection":[56],"schemes":[57,160],"may":[58],"eventually":[59],"prove":[60],"significantly":[61],"inadequate":[62],"ineffective.":[64],"In":[65],"this":[66,154],"paper,":[67],"we":[68],"propose":[69],"a":[70],"framework":[72],"conducting":[74],"comprehensive":[75],"studies":[76],"characterization":[78,140],"on":[79,116],"the":[80,117,131,139,172],"reliability":[81,159],"behavior":[82],"of":[83,119,141,144,174],"memories,":[85],"order":[87],"provide":[89],"insight":[90],"into":[91],"vulnerability":[93,143],"soft":[95],"as":[97,99],"well":[98],"design":[100,155],"guidance":[101],"architects":[103],"highly":[105],"efficient":[106],"memory":[110],"design.":[111],"Our":[112],"work":[113],"is":[114,167],"based":[115],"development":[118],"lifetime":[121,149],"models":[122,137],"data":[124,132],"tag":[126],"arrays":[127],"residing":[128],"both":[130],"instruction":[134],"caches.":[135],"Those":[136],"facilitate":[138],"stored":[145],"items":[146],"at":[147,162],"phases.":[150,165],"We":[151],"then":[152],"exemplify":[153],"methodology":[156],"proposing":[158],"targeting":[161],"specific":[163],"vulnerable":[164],"Benchmarking":[166],"carried":[168],"out":[169],"showcase":[171],"effectiveness":[173],"our":[175],"approach.":[176]},"counts_by_year":[{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":4}],"updated_date":"2026-10-07T09:51:55.459714","created_date":"2025-10-10T00:00:00"}