{"id":"https://openalex.org/W2106635847","doi":"https://doi.org/10.1109/tns.2004.834955","title":"Selective triple Modular redundancy (STMR) based single-event upset (SEU) tolerant synthesis for FPGAs","display_name":"Selective triple Modular redundancy (STMR) based single-event upset (SEU) tolerant synthesis for FPGAs","publication_year":2004,"publication_date":"2004-10-01","ids":{"openalex":"https://openalex.org/W2106635847","doi":"https://doi.org/10.1109/tns.2004.834955","mag":"2106635847"},"language":"en","primary_location":{"id":"doi:10.1109/tns.2004.834955","doi":"https://doi.org/10.1109/tns.2004.834955","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tns.2004.834955","pdf_url":null,"source":{"id":"https://openalex.org/S14279044","display_name":"IEEE Transactions on Nuclear Science","issn_l":"0018-9499","issn":["0018-9499","1558-1578"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","dongbi-b","jufo-1","norway-1","poland-70","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Nuclear Science","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043655963","display_name":"P.K. Samudrala","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210117836","display_name":"Space Micro (United States)","ror":"https://ror.org/03bc0qh53","country_code":"US","type":"company","lineage":["https://openalex.org/I4210117836"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P.K. Samudrala","raw_affiliation_strings":["Space Micro, Inc.orporated, San Diego, CA, USA","Space Micro Inc., San Diego, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Space Micro, Inc.orporated, San Diego, CA, USA","institution_ids":["https://openalex.org/I4210117836"]},{"raw_affiliation_string":"Space Micro Inc., San Diego, CA, USA","institution_ids":["https://openalex.org/I4210117836"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026971692","display_name":"Javier Ramos","orcid":"https://orcid.org/0000-0003-2972-0370","observed_orcids":["https://orcid.org/0000-0003-2972-0370"]},"institutions":[{"id":"https://openalex.org/I82514191","display_name":"Honeywell (United States)","ror":"https://ror.org/02t71h845","country_code":"US","type":"company","lineage":["https://openalex.org/I82514191"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Ramos","raw_affiliation_strings":["Honeywell Space Systems, Inc., Clear Water, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Honeywell Space Systems, Inc., Clear Water, FL, USA","institution_ids":["https://openalex.org/I82514191"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016167446","display_name":"Srinivas Katkoori","orcid":"https://orcid.org/0000-0002-7589-5836","observed_orcids":["https://orcid.org/0000-0002-7589-5836"]},"institutions":[{"id":"https://openalex.org/I2613432","display_name":"University of South Florida","ror":"https://ror.org/032db5x82","country_code":"US","type":"education","lineage":["https://openalex.org/I2613432"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Katkoori","raw_affiliation_strings":["CSE Department, University of South Florida, Tampa, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CSE Department, University of South Florida, Tampa, FL, USA","institution_ids":["https://openalex.org/I2613432"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":5.0652,"has_fulltext":false,"cited_by_count":211,"citation_normalized_percentile":{"value":0.95212949,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":95,"max":100},"biblio":{"volume":"51","issue":"5","first_page":"2957","last_page":"2969"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/single-event-upset","display_name":"single event upset","score":0.8090000152587891},{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"triple modular redundancy","score":0.9869999885559082},{"id":"https://openalex.org/keywords/fpga","display_name":"FPGA","score":0.5550000071525574},{"id":"https://openalex.org/keywords/radiation-hardening","display_name":"radiation hardening","score":0.6840000152587891},{"id":"https://openalex.org/keywords/tri-state-buffers","display_name":"tri-state buffers","score":0.9190000295639038},{"id":"https://openalex.org/keywords/area-overhead-reduction","display_name":"area overhead reduction","score":0.6579999923706055},{"id":"https://openalex.org/keywords/xilinx-virtex","display_name":"Xilinx Virtex","score":0.7070000171661377},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"reconfigurable computing","score":0.49900001287460327}],"concepts":[{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.8893993496894836},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.67399662733078},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.6224721074104309},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.6210117936134338},{"id":"https://openalex.org/C2780073065","wikidata":"https://www.wikidata.org/wiki/Q1476733","display_name":"Single event upset","level":3,"score":0.5945310592651367},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.58575040102005},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.5712357759475708},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5531854629516602},{"id":"https://openalex.org/C2778002589","wikidata":"https://www.wikidata.org/wiki/Q2406791","display_name":"Upset","level":2,"score":0.5444390177726746},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5304545760154724},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.503633439540863},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.4772986173629761},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.45064976811408997},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.34035950899124146},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33942294120788574},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2322710156440735},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1835770308971405},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.17349785566329956},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.17153948545455933},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tns.2004.834955","doi":"https://doi.org/10.1109/tns.2004.834955","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tns.2004.834955","pdf_url":null,"source":{"id":"https://openalex.org/S14279044","display_name":"IEEE Transactions on Nuclear Science","issn_l":"0018-9499","issn":["0018-9499","1558-1578"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","dongbi-b","jufo-1","norway-1","poland-70","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Nuclear Science","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W48552920","https://openalex.org/W120121098","https://openalex.org/W182235928","https://openalex.org/W188872012","https://openalex.org/W997971340","https://openalex.org/W1511688816","https://openalex.org/W1857708274","https://openalex.org/W2041753256","https://openalex.org/W2050431855","https://openalex.org/W2069792970","https://openalex.org/W2100313702","https://openalex.org/W2111607338","https://openalex.org/W2144427804","https://openalex.org/W2145423746","https://openalex.org/W2150573663","https://openalex.org/W2159087151","https://openalex.org/W2160119788","https://openalex.org/W2160802886","https://openalex.org/W2163493261","https://openalex.org/W2170553935","https://openalex.org/W3182208082","https://openalex.org/W4285719527","https://openalex.org/W6607707959"],"related_works":["https://openalex.org/W2170171948","https://openalex.org/W2151942105","https://openalex.org/W570149829","https://openalex.org/W2037126791","https://openalex.org/W2749187408","https://openalex.org/W3142488006","https://openalex.org/W2132084351","https://openalex.org/W2896009776","https://openalex.org/W2103890758","https://openalex.org/W2121426527"],"abstract_inverted_index":{"We":[0,90],"present":[1,92],"a":[2,33,93,116],"design":[3],"technique":[4],"for":[5,68],"hardening":[6],"combinational":[7,35],"circuits":[8,66],"mapped":[9],"onto":[10],"Xilinx":[11],"Virtex":[12,72,155],"FPGAs":[13],"against":[14,42],"single-event":[15],"upsets":[16],"(SEUs).":[17],"The":[18,37],"signal":[19],"probabilities":[20],"of":[21,32,63,76,119,132,154],"the":[22,61,64,69,105,122,129,133,139,149],"lines":[23],"can":[24,39,80,126,156],"be":[25,40,81],"used":[26],"to":[27,51,83,99,138],"detect":[28],"SEU":[29,85,94,120,161],"sensitive":[30,53],"subcircuits":[31],"given":[34],"circuit.":[36],"circuit":[38,135],"hardened":[41,134],"SEUs":[43,103],"by":[44],"selectively":[45],"applying":[46],"triple":[47,141],"modular":[48,142],"redundancy":[49,143],"(STMR)":[50],"these":[52],"subcircuits.":[54],"However,":[55],"there":[56],"is":[57,109],"an":[58],"increase":[59],"in":[60,104,158],"number":[62,75],"voter":[65,88],"required":[67],"STMR":[70,107,124,145],"circuits.":[71,89,106],"has":[73],"abundant":[74],"tri-state":[77],"buffers":[78],"that":[79],"employed":[82],"construct":[84],"immune":[86],"majority":[87],"also":[91],"fault":[95],"insertion":[96],"simulator":[97],"designed":[98],"introduce":[100],"errors":[101],"representing":[102],"method":[108,125,146],"thoroughly":[110],"tested":[111],"on":[112],"MCNC'91":[113],"benchmarks.":[114],"With":[115],"small":[117],"loss":[118],"immunity,":[121],"proposed":[123],"greatly":[127],"reduce":[128],"area":[130],"overhead":[131],"when":[136],"compared":[137],"state-of-the-art":[140],"(TMR).":[144],"along":[147],"with":[148],"readback":[150],"and":[151],"reconfiguration":[152],"feature":[153],"result":[157],"very":[159],"high":[160],"immunity.":[162]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":10},{"year":2020,"cited_by_count":11},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":8},{"year":2017,"cited_by_count":12},{"year":2016,"cited_by_count":17},{"year":2015,"cited_by_count":19},{"year":2014,"cited_by_count":8},{"year":2013,"cited_by_count":13},{"year":2012,"cited_by_count":8}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}
