{"id":"https://openalex.org/W2106019019","doi":"https://doi.org/10.1109/vlsic.1995.520707","title":"A 286 mm/sup 2/ 256 Mb DRAM with X32 both-ends DQ","display_name":"A 286 mm/sup 2/ 256 Mb DRAM with X32 both-ends DQ","publication_year":2002,"publication_date":"2002-11-19","ids":{"openalex":"https://openalex.org/W2106019019","doi":"https://doi.org/10.1109/vlsic.1995.520707","mag":"2106019019"},"language":"fr","primary_location":{"id":"doi:10.1109/vlsic.1995.520707","doi":"https://doi.org/10.1109/vlsic.1995.520707","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsic.1995.520707","pdf_url":null,"source":{"id":"https://openalex.org/S4393918263","display_name":"Symposium on VLSI Circuits","issn_l":"2166-9600","issn":["2166-9600"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Digest of Technical Papers., Symposium on VLSI Circuits.","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026392622","display_name":"Yoshihiro Watanabe","orcid":"https://orcid.org/0000-0002-5756-0530","observed_orcids":["https://orcid.org/0000-0002-5756-0530"]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210150981","display_name":"Toshiba (United States)","ror":"https://ror.org/051vpgk97","country_code":"US","type":"company","lineage":["https://openalex.org/I1292669757","https://openalex.org/I4210150981"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Y. Watanabe","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210150981"]}]},{"author_position":"middle","author":{"id":null,"display_name":"H. Wong","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Wong","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079341609","display_name":"Toshiaki Kirihata","orcid":"https://orcid.org/0000-0002-3507-0274","observed_orcids":["https://orcid.org/0000-0002-3507-0274"]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Kirihata","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":null,"display_name":"D. Kato","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210150981","display_name":"Toshiba (United States)","ror":"https://ror.org/051vpgk97","country_code":"US","type":"company","lineage":["https://openalex.org/I1292669757","https://openalex.org/I4210150981"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Kato","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210150981"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047157491","display_name":"J. DeBrosse","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. DeBrosse","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051298722","display_name":"Taeko Hara","orcid":"https://orcid.org/0000-0003-1105-0524","observed_orcids":["https://orcid.org/0000-0003-1105-0524"]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210150981","display_name":"Toshiba (United States)","ror":"https://ror.org/051vpgk97","country_code":"US","type":"company","lineage":["https://openalex.org/I1292669757","https://openalex.org/I4210150981"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Hara","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210150981"]}]},{"author_position":"middle","author":{"id":null,"display_name":"M. Yoshida","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210150981","display_name":"Toshiba (United States)","ror":"https://ror.org/051vpgk97","country_code":"US","type":"company","lineage":["https://openalex.org/I1292669757","https://openalex.org/I4210150981"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Yoshida","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210150981"]}]},{"author_position":"middle","author":{"id":null,"display_name":"H. Mukai","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210150981","display_name":"Toshiba (United States)","ror":"https://ror.org/051vpgk97","country_code":"US","type":"company","lineage":["https://openalex.org/I1292669757","https://openalex.org/I4210150981"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Mukai","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210150981"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050521958","display_name":"Khandker N. Quader","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Quader","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":null,"display_name":"T. Nagai","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210150981","display_name":"Toshiba (United States)","ror":"https://ror.org/051vpgk97","country_code":"US","type":"company","lineage":["https://openalex.org/I1292669757","https://openalex.org/I4210150981"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Nagai","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210150981"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020161854","display_name":"P. Poechmueller","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Poechmueller","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Siemens AG, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Siemens AG, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079787384","display_name":"K. Peter Pfefferl","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Pfefferl","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Siemens AG, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Siemens AG, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109989545","display_name":"Matthew R. Wordeman","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Wordeman","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, IBM, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":null,"display_name":"S. Fujii","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210150981","display_name":"Toshiba (United States)","ror":"https://ror.org/051vpgk97","country_code":"US","type":"company","lineage":["https://openalex.org/I1292669757","https://openalex.org/I4210150981"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Fujii","raw_affiliation_strings":["IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Semiconductor Research and Development Center, Toshiba, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210150981"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"28","issue":null,"first_page":"105","last_page":"106"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.760699987411499,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.760699987411499,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.10530000180006027,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.06199999898672104,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"DRAM","score":0.9639999866485596},{"id":"https://openalex.org/keywords/die-size-reduction","display_name":"die size reduction","score":0.6759999990463257}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.9367682933807373},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.676166296005249},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.6273316144943237},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.49498194456100464},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4691566228866577},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43507063388824463},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.42897215485572815},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4185778498649597},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3610140085220337},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3232588768005371},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.292832612991333},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18007513880729675},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.11922013759613037},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.10875105857849121},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0841553807258606}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsic.1995.520707","doi":"https://doi.org/10.1109/vlsic.1995.520707","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsic.1995.520707","pdf_url":null,"source":{"id":"https://openalex.org/S4393918263","display_name":"Symposium on VLSI Circuits","issn_l":"2166-9600","issn":["2166-9600"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Digest of Technical Papers., Symposium on VLSI Circuits.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320311826","display_name":"Chengdu University of Information Technology","ror":"https://ror.org/01yxwrh59"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2270941433","https://openalex.org/W1532787294","https://openalex.org/W2028675360","https://openalex.org/W2489588635","https://openalex.org/W2150991407","https://openalex.org/W4231523356","https://openalex.org/W2103032983","https://openalex.org/W2285689837","https://openalex.org/W2106389732","https://openalex.org/W2141086951"],"abstract_inverted_index":{"The":[0],"growing":[1],"market":[2],"for":[3,11,33],"high":[4],"performance":[5],"PCs":[6],"has":[7],"created":[8],"a":[9,12,29,54,80,96],"demand":[10],"new":[13],"generation":[14],"of":[15,88],"DRAMs":[16,91],"with":[17,100],"wide":[18,55,89],"bit":[19],"organization.":[20,102],"A":[21],"wider":[22],"I/O":[23,74,90],"DRAM":[24,99],"is":[25],"necessary":[26],"to":[27,52,66,95],"provide":[28,53],"sufficiently":[30],"small":[31],"granularity":[32],"the":[34,45,73,85],"memory":[35,46],"system.":[36],"Hierarchical":[37],"data-line":[38],"architectures":[39],"which":[40,83],"transfer":[41],"many":[42],"bits":[43],"over":[44],"array":[47],"could":[48],"potentially":[49],"be":[50],"used":[51],"I/O.":[56],"However,":[57],"even":[58],"using":[59],"these":[60],"schemes,":[61],"chip":[62,81],"size":[63,87],"must":[64],"expand":[65],"accommodate":[67],"additional":[68],"devices":[69],"and":[70,92],"wiring":[71],"as":[72],"width":[75],"increases.":[76],"This":[77],"paper":[78],"describes":[79],"architecture":[82],"minimizes":[84],"die":[86],"its":[93],"application":[94],"256":[97],"Mb":[98],"X32":[101]},"counts_by_year":[],"updated_date":"2026-10-14T16:39:01.820549","created_date":"2016-06-24T00:00:00"}
