{"id":"https://openalex.org/W2104946435","doi":"https://doi.org/10.1007/s10470-013-0107-x","title":"Verification of the power-down mode of analog circuits by structural voltage propagation","display_name":"Verification of the power-down mode of analog circuits by structural voltage propagation","publication_year":2013,"publication_date":"2013-08-02","ids":{"openalex":"https://openalex.org/W2104946435","doi":"https://doi.org/10.1007/s10470-013-0107-x","mag":"2104946435"},"language":"en","primary_location":{"id":"doi:10.1007/s10470-013-0107-x","doi":"https://doi.org/10.1007/s10470-013-0107-x","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10470-013-0107-x","pdf_url":null,"source":{"id":"https://openalex.org/S76600781","display_name":"Analog Integrated Circuits and Signal Processing","issn_l":"0925-1030","issn":["0925-1030","1573-1979"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-d","jufo-1","ki-jl-1","norway-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Analog Integrated Circuits and Signal Processing","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031404230","display_name":"Michael Zwerger","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Michael Zwerger","raw_affiliation_strings":["Institute for Electronic Design Automation, Technische Universitaet Muenchen, Arcisstr. 21, 80333, Munich, Germany","Institute for Electronic Design Automation, Technische Universitaet Muenchen, Munich, Germany 80333#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Electronic Design Automation, Technische Universitaet Muenchen, Arcisstr. 21, 80333, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Institute for Electronic Design Automation, Technische Universitaet Muenchen, Munich, Germany 80333#TAB#","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033163680","display_name":"Helmut Graeb","orcid":"https://orcid.org/0000-0002-7626-1958","observed_orcids":["https://orcid.org/0000-0002-7626-1958"]},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Helmut Graeb","raw_affiliation_strings":["Institute for Electronic Design Automation, Technische Universitaet Muenchen, Arcisstr. 21, 80333, Munich, Germany","Institute for Electronic Design Automation, Technische Universitaet Muenchen, Munich, Germany 80333#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Electronic Design Automation, Technische Universitaet Muenchen, Arcisstr. 21, 80333, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Institute for Electronic Design Automation, Technische Universitaet Muenchen, Munich, Germany 80333#TAB#","institution_ids":["https://openalex.org/I62916508"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5031404230"],"corresponding_institution_ids":["https://openalex.org/I62916508"],"apc_list":{"value":3290,"currency":"USD","value_usd":3290},"apc_paid":null,"fwci":1.6726,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.86386395,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":97},"biblio":{"volume":"78","issue":"1","first_page":"177","last_page":"189"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.8901000022888184,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.8901000022888184,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.03629999980330467,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.02410000003874302,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-down-mode","display_name":"power-down mode","score":0.8920000195503235},{"id":"https://openalex.org/keywords/analog-circuits","display_name":"analog circuits","score":0.8500000238418579},{"id":"https://openalex.org/keywords/floating-nodes","display_name":"floating nodes","score":0.8939999938011169},{"id":"https://openalex.org/keywords/propagation-graph","display_name":"propagation graph","score":0.9480000138282776},{"id":"https://openalex.org/keywords/circuit-verification","display_name":"circuit verification","score":0.5889999866485596},{"id":"https://openalex.org/keywords/static-behavior","display_name":"static behavior","score":0.3089999854564667},{"id":"https://openalex.org/keywords/reliability","display_name":"reliability","score":0.40799999237060547},{"id":"https://openalex.org/keywords/stress","display_name":"stress","score":0.36399999260902405}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5895368456840515},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5824379324913025},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5663207173347473},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.47659868001937866},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.45498740673065186},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.42923545837402344},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.41369062662124634},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31924986839294434},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2999369502067566},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06369391083717346},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s10470-013-0107-x","doi":"https://doi.org/10.1007/s10470-013-0107-x","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10470-013-0107-x","pdf_url":null,"source":{"id":"https://openalex.org/S76600781","display_name":"Analog Integrated Circuits and Signal Processing","issn_l":"0925-1030","issn":["0925-1030","1573-1979"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-d","jufo-1","ki-jl-1","norway-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Analog Integrated Circuits and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W188802254","https://openalex.org/W1496337953","https://openalex.org/W1514948031","https://openalex.org/W1990203991","https://openalex.org/W2053768627","https://openalex.org/W2059454390","https://openalex.org/W2095598799","https://openalex.org/W2106388587","https://openalex.org/W2136335657","https://openalex.org/W2139320986","https://openalex.org/W4236182951","https://openalex.org/W6675978924"],"related_works":["https://openalex.org/W2053768627","https://openalex.org/W2311707718","https://openalex.org/W2748026389","https://openalex.org/W3009070895","https://openalex.org/W2966952903","https://openalex.org/W4231838056","https://openalex.org/W1496337953","https://openalex.org/W7057050292","https://openalex.org/W2613377735","https://openalex.org/W2124724398"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":3}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}
