{"id":"https://openalex.org/W2098549513","doi":"https://doi.org/10.1109/date.2007.364477","title":"BIST Method for Die-Level Process Parameter Variation Monitoring in Analog/Mixed-Signal Integrated Circuits","display_name":"BIST Method for Die-Level Process Parameter Variation Monitoring in Analog/Mixed-Signal Integrated Circuits","publication_year":2007,"publication_date":"2007-04-01","ids":{"openalex":"https://openalex.org/W2098549513","doi":"https://doi.org/10.1109/date.2007.364477","mag":"2098549513"},"language":"en","primary_location":{"id":"doi:10.1109/date.2007.364477","doi":"https://doi.org/10.1109/date.2007.364477","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2007.364477","pdf_url":null,"source":{"id":"https://openalex.org/S4306418181","display_name":"Design, Automation, and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 Design, Automation &amp; Test in Europe Conference &amp; Exhibition","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://research.tue.nl/en/publications/0348ce85-2838-4205-95ba-87c884bf25f8","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019444861","display_name":"Amir Zjajo","orcid":"https://orcid.org/0000-0002-0716-8186","observed_orcids":["https://orcid.org/0000-0002-0716-8186"]},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Amir Zjajo","raw_affiliation_strings":["philips Research Laboratories, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"philips Research Laboratories, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085204712","display_name":"Manuel J. Barrag\u00e1n","orcid":"https://orcid.org/0000-0003-0187-604X","observed_orcids":["https://orcid.org/0000-0003-0187-604X"]},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Manuel J. Barragan Asian","raw_affiliation_strings":["Instituto de Microelectronica de Seville, University of Seville, Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectronica de Seville, University of Seville, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050945839","display_name":"Jos\u00e9 Pineda de Gyvez","orcid":"https://orcid.org/0000-0002-0723-7065","observed_orcids":["https://orcid.org/0000-0002-0723-7065"]},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]},{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Jose Pineda de Gyvez","raw_affiliation_strings":["Eindhoven University of Technology, Eindhoven, The Netherlands","philips Research Laboratories, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Eindhoven University of Technology, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I83019370"]},{"raw_affiliation_string":"philips Research Laboratories, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2515,"has_fulltext":true,"cited_by_count":32,"citation_normalized_percentile":{"value":0.775691,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":87,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.0005000000237487257,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"built-in self-test","score":0.9399999976158142},{"id":"https://openalex.org/keywords/process-parameter-variation","display_name":"process parameter variation","score":0.8450000286102295},{"id":"https://openalex.org/keywords/analog-integrated-circuits","display_name":"analog integrated circuits","score":0.8960000276565552},{"id":"https://openalex.org/keywords/mixed-signal-circuits","display_name":"mixed-signal circuits","score":0.9890000224113464},{"id":"https://openalex.org/keywords/production-testing","display_name":"production testing","score":0.6740000247955322},{"id":"https://openalex.org/keywords/on-chip-monitoring","display_name":"on-chip monitoring","score":0.6119999885559082},{"id":"https://openalex.org/keywords/performance-estimation","display_name":"performance estimation","score":0.47600001096725464}],"concepts":[{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.6633548736572266},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.6519858837127686},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.6456841230392456},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5776531100273132},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.5695110559463501},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5691259503364563},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5648452043533325},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5596461296081543},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5326293110847473},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.5025029182434082},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4877210557460785},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47324663400650024},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.42199116945266724},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.34944361448287964},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3072627782821655},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23110747337341309},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12735754251480103},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09334611892700195},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.09234786033630371},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":8,"locations":[{"id":"doi:10.1109/date.2007.364477","doi":"https://doi.org/10.1109/date.2007.364477","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2007.364477","pdf_url":null,"source":{"id":"https://openalex.org/S4306418181","display_name":"Design, Automation, and Test in Europe","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 Design, Automation &amp; Test in Europe Conference &amp; Exhibition","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.tue.nl:openaire/0348ce85-2838-4205-95ba-87c884bf25f8","doi":null,"is_oa":true,"landing_page_url":"https://research.tue.nl/en/publications/0348ce85-2838-4205-95ba-87c884bf25f8","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Zjajo, A, Barragan Asian, M J & Pineda de Gyvez, J 2007, BIST method for die-level process parameter variation monitoring in analog/mixed-signal integrated circuits. in Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2007, DATE '07, 16-20 April 2007, Nice Acropolis, France. Institute of Electrical and Electronics Engineers, New York, pp. 1-6. https://doi.org/10.1109/DATE.2007.364477","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:710346","doi":null,"is_oa":false,"landing_page_url":"http://library.tue.nl/csp/dare/LinkToRepository.csp?recordnumber=710346","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":null},{"id":"pmh:oai:HAL:hal-02352381v1","doi":null,"is_oa":false,"landing_page_url":"https://hal.science/hal-02352381","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I4405252976","host_organization_name":"Centre pour la Communication Scientifique Directe","host_organization_lineage":["https://openalex.org/I4405252976"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Design, Automation & Test in Europe Conference, Apr 2007, Nice, France. pp.1-6, &#x27E8;10.1109/DATE.2007.364477&#x27E9;","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:digital.csic.es:10261/30666","doi":null,"is_oa":true,"landing_page_url":"http://hdl.handle.net/10261/30666","pdf_url":null,"source":{"id":"https://openalex.org/S4306400616","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Comunicaci\u00f3n de congreso"},{"id":"pmh:oai:library.tue.nl:710346","doi":null,"is_oa":false,"landing_page_url":"http://repository.tue.nl/710346","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":null},{"id":"pmh:tue:oai:library.tue.nl:710346","doi":null,"is_oa":false,"landing_page_url":"http://repository.tue.nl/710346","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/other"},{"id":"pmh:tue:oai:pure.tue.nl:publications/0348ce85-2838-4205-95ba-87c884bf25f8","doi":null,"is_oa":true,"landing_page_url":"https://research.tue.nl/nl/publications/0348ce85-2838-4205-95ba-87c884bf25f8","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Proceedings of the Design, Automation &amp; Test in Europe Conference &amp; Exhibition, 2007, DATE '07, 16-20 April 2007, Nice Acropolis, France, 1 - 6","raw_type":"info:eu-repo/semantics/conferencepaper"}],"best_oa_location":{"id":"pmh:oai:pure.tue.nl:openaire/0348ce85-2838-4205-95ba-87c884bf25f8","doi":null,"is_oa":true,"landing_page_url":"https://research.tue.nl/en/publications/0348ce85-2838-4205-95ba-87c884bf25f8","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Zjajo, A, Barragan Asian, M J & Pineda de Gyvez, J 2007, BIST method for die-level process parameter variation monitoring in analog/mixed-signal integrated circuits. in Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2007, DATE '07, 16-20 April 2007, Nice Acropolis, France. Institute of Electrical and Electronics Engineers, New York, pp. 1-6. https://doi.org/10.1109/DATE.2007.364477","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"score":0.4943999946117401,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1692111091","https://openalex.org/W2022977241","https://openalex.org/W2054878597","https://openalex.org/W2060075354","https://openalex.org/W2101752872","https://openalex.org/W2103367702","https://openalex.org/W2112890229","https://openalex.org/W2146116573","https://openalex.org/W2537264164","https://openalex.org/W4230446214","https://openalex.org/W4242626108","https://openalex.org/W4249261768"],"related_works":["https://openalex.org/W2058060992","https://openalex.org/W2155285526","https://openalex.org/W2045733337","https://openalex.org/W2149724644","https://openalex.org/W7048720760","https://openalex.org/W2006907450","https://openalex.org/W7144019274","https://openalex.org/W2266623553","https://openalex.org/W2155796482","https://openalex.org/W2255897910"],"abstract_inverted_index":{"This":[0],"paper":[1],"reports":[2],"a":[3,33],"new":[4],"built-in":[5],"self-test":[6],"scheme":[7],"for":[8,36],"analog":[9],"and":[10,73,87,93],"mixed-signal":[11],"devices":[12],"based":[13],"on":[14],"die-level":[15],"process":[16,41,60,89],"monitoring.":[17],"The":[18,82],"objective":[19],"of":[20,39,51,58,78],"this":[21],"test":[22,72],"is":[23,67,91],"not":[24],"to":[25,31,69,74],"replace":[26],"traditional":[27],"specification-based":[28],"tests,":[29],"but":[30],"provide":[32],"reliable":[34],"method":[35],"early":[37],"identification":[38],"excessive":[40],"parameter":[42],"variations":[43,90],"in":[44],"production":[45],"tests":[46],"that":[47],"allows":[48],"quickly":[49],"discarding":[50],"the":[52,56,71,76,95],"faulty":[53],"circuits.":[54],"Additionally,":[55],"possibility":[57],"on-chip":[59],"deviation":[61],"monitoring":[62,88],"provides":[63],"valuable":[64],"information,":[65],"which":[66],"used":[68],"guide":[70],"allow":[75],"estimation":[77],"selected":[79],"performance":[80],"figures.":[81],"information":[83],"obtained":[84],"through":[85],"guiding":[86],"re-used":[92],"supplement":[94],"circuit":[96],"calibration":[97]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}
