{"id":"https://openalex.org/W2097926540","doi":"https://doi.org/10.1109/31.103222","title":"An enhancement-mode MOS voltage-controlled linear resistor with large dynamic range","display_name":"An enhancement-mode MOS voltage-controlled linear resistor with large dynamic range","publication_year":1990,"publication_date":"1990-01-01","ids":{"openalex":"https://openalex.org/W2097926540","doi":"https://doi.org/10.1109/31.103222","mag":"2097926540"},"language":"en","primary_location":{"id":"doi:10.1109/31.103222","doi":"https://doi.org/10.1109/31.103222","is_oa":false,"landing_page_url":"https://doi.org/10.1109/31.103222","pdf_url":null,"source":{"id":"https://openalex.org/S185806230","display_name":"IEEE Transactions on Circuits and Systems","issn_l":"0098-4094","issn":["0098-4094","1558-1276"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101616132","display_name":"Gunhwi Moon","orcid":"https://orcid.org/0009-0000-2369-3645","observed_orcids":["https://orcid.org/0009-0000-2369-3645"]},"institutions":[{"id":"https://openalex.org/I193531525","display_name":"George Washington University","ror":"https://ror.org/00y4zzh67","country_code":"US","type":"education","lineage":["https://openalex.org/I193531525"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Moon","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, George Washington University, Washington D.C., USA","Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., DC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, George Washington University, Washington D.C., USA","institution_ids":["https://openalex.org/I193531525"]},{"raw_affiliation_string":"Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., DC, USA","institution_ids":["https://openalex.org/I193531525"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016036076","display_name":"Mona Elwakkad Zaghloul","orcid":"https://orcid.org/0000-0003-1089-5138","observed_orcids":["https://orcid.org/0000-0003-1089-5138"]},"institutions":[{"id":"https://openalex.org/I193531525","display_name":"George Washington University","ror":"https://ror.org/00y4zzh67","country_code":"US","type":"education","lineage":["https://openalex.org/I193531525"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M.E. Zaghloul","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, George Washington University, Washington D.C., USA","Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., DC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, George Washington University, Washington D.C., USA","institution_ids":["https://openalex.org/I193531525"]},{"raw_affiliation_string":"Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., DC, USA","institution_ids":["https://openalex.org/I193531525"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091032119","display_name":"R.W. Newcomb","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R.W. Newcomb","raw_affiliation_strings":["Department of Electrical Engineering, University of Maryland, College Park, MD, USA","Department of Electrical Engineering, University of Maryland College Park, MD USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Maryland, College Park, MD, USA","institution_ids":["https://openalex.org/I66946132"]},{"raw_affiliation_string":"Department of Electrical Engineering, University of Maryland College Park, MD USA#TAB#","institution_ids":["https://openalex.org/I66946132"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.8074,"has_fulltext":false,"cited_by_count":66,"citation_normalized_percentile":{"value":0.89805545,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":87,"max":97},"biblio":{"volume":"37","issue":"10","first_page":"1284","last_page":"1288"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.0010999999940395355,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.0003000000142492354,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dynamic-range","display_name":"dynamic range","score":0.8600000143051147},{"id":"https://openalex.org/keywords/bias-sources","display_name":"bias sources","score":0.8069999814033508},{"id":"https://openalex.org/keywords/linearity","display_name":"linearity","score":0.7630000114440918},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"integrated circuit layout","score":0.609000027179718},{"id":"https://openalex.org/keywords/analog-circuit-design","display_name":"analog circuit design","score":0.3449999988079071}],"concepts":[{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.9116252660751343},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.6844626069068909},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.6586031913757324},{"id":"https://openalex.org/C2776179129","wikidata":"https://www.wikidata.org/wiki/Q7998640","display_name":"Wide dynamic range","level":2,"score":0.550706684589386},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.5501091480255127},{"id":"https://openalex.org/C61818909","wikidata":"https://www.wikidata.org/wiki/Q1987617","display_name":"Pull-up resistor","level":5,"score":0.5056455135345459},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4990255832672119},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.48517709970474243},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47304052114486694},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.4398702383041382},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4357622265815735},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4014948606491089},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3451891243457794},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.271126389503479},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2625998854637146},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.1143922507762909},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/31.103222","doi":"https://doi.org/10.1109/31.103222","is_oa":false,"landing_page_url":"https://doi.org/10.1109/31.103222","pdf_url":null,"source":{"id":"https://openalex.org/S185806230","display_name":"IEEE Transactions on Circuits and Systems","issn_l":"0098-4094","issn":["0098-4094","1558-1276"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2006097283","https://openalex.org/W2013517457","https://openalex.org/W2048571877","https://openalex.org/W2059827961","https://openalex.org/W2129529945","https://openalex.org/W2132827539","https://openalex.org/W2149789716","https://openalex.org/W2162936965"],"related_works":["https://openalex.org/W2132827539","https://openalex.org/W1973380283","https://openalex.org/W2117939930","https://openalex.org/W2072985584","https://openalex.org/W2532803238","https://openalex.org/W2162512736","https://openalex.org/W2535139050","https://openalex.org/W2047160367","https://openalex.org/W2013517457","https://openalex.org/W2127243606"],"abstract_inverted_index":{"It":[0],"is":[1],"shown":[2],"that":[3],"the":[4,32,36,43,55],"depletion-mode":[5],"linear":[6],"resistor":[7],"of":[8,35],"Babanezhad":[9],"and":[10,51],"Temes":[11],"(IEEE":[12],"J.":[13],"Solid-State":[14],"Circuits,":[15],"vol.":[16],"SC-19,":[17],"p.932-8,":[18],"1984)":[19],"can":[20,45],"be":[21,47],"implemented":[22],"in":[23,31],"enhancement-mode":[24],"devices.":[25],"This":[26],"allows":[27],"a":[28,40],"large":[29],"increase":[30],"dynamic":[33],"range":[34],"resistors.":[37],"By":[38],"inserting":[39],"bias":[41],"source,":[42],"linearity":[44],"also":[46],"improved.":[48],"A":[49],"layout":[50],"experimental":[52],"results":[53],"on":[54],"resulting":[56],"IC":[57],"are":[58],"included.>":[59]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2026-09-22T06:50:58.402377","created_date":"2016-06-24T00:00:00"}