{"id":"https://openalex.org/W2071660003","doi":"https://doi.org/10.1109/vtsa.2009.5159273","title":"Stress-enhancement technique in narrowing NMOSFETs with damascene-gate process and tensile liner","display_name":"Stress-enhancement technique in narrowing NMOSFETs with damascene-gate process and tensile liner","publication_year":2009,"publication_date":"2009-04-01","ids":{"openalex":"https://openalex.org/W2071660003","doi":"https://doi.org/10.1109/vtsa.2009.5159273","mag":"2071660003"},"language":"en","primary_location":{"id":"doi:10.1109/vtsa.2009.5159273","doi":"https://doi.org/10.1109/vtsa.2009.5159273","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vtsa.2009.5159273","pdf_url":null,"source":{"id":"https://openalex.org/S7407086210","display_name":"International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Symposium on VLSI Technology, Systems, and Applications","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086118450","display_name":"Satoru Mayuzumi","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210143797","display_name":"Sony (Japan)","ror":"https://ror.org/04wzv3n59","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210143797"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"S. Mayuzumi","raw_affiliation_strings":["Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210143797"]},{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan","institution_ids":["https://openalex.org/I4210143797"]}]},{"author_position":"middle","author":{"id":null,"display_name":"S. Yamakawa","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210143797","display_name":"Sony (Japan)","ror":"https://ror.org/04wzv3n59","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210143797"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"S. Yamakawa","raw_affiliation_strings":["Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210143797"]},{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan","institution_ids":["https://openalex.org/I4210143797"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071671250","display_name":"Yasushi Tateshita","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210143797","display_name":"Sony (Japan)","ror":"https://ror.org/04wzv3n59","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210143797"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Tateshita","raw_affiliation_strings":["Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210143797"]},{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan","institution_ids":["https://openalex.org/I4210143797"]}]},{"author_position":"middle","author":{"id":null,"display_name":"M. Tsukamoto","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210143797","display_name":"Sony (Japan)","ror":"https://ror.org/04wzv3n59","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210143797"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Tsukamoto","raw_affiliation_strings":["Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210143797"]},{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan","institution_ids":["https://openalex.org/I4210143797"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044481452","display_name":"Hitoshi Wakabayashi","orcid":"https://orcid.org/0000-0001-5509-521X","observed_orcids":["https://orcid.org/0000-0001-5509-521X","https://orcid.org/0000-0002-8527-1402"]},"institutions":[{"id":"https://openalex.org/I4210143797","display_name":"Sony (Japan)","ror":"https://ror.org/04wzv3n59","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210143797"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Wakabayashi","raw_affiliation_strings":["Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210143797"]},{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan","institution_ids":["https://openalex.org/I4210143797"]}]},{"author_position":"middle","author":{"id":null,"display_name":"T. Ohno","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210143797","display_name":"Sony (Japan)","ror":"https://ror.org/04wzv3n59","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210143797"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Ohno","raw_affiliation_strings":["Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210143797"]},{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan","institution_ids":["https://openalex.org/I4210143797"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102060909","display_name":"N. Nagashima","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210143797","display_name":"Sony (Japan)","ror":"https://ror.org/04wzv3n59","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210143797"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"N. Nagashima","raw_affiliation_strings":["Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210143797"]},{"raw_affiliation_string":"Semiconductor Technology Development Division, Semiconductor Business Group, SONY Corporation, Atsugi Tec., 4-14-1 Asahi-cho, Kanagawa, 243-0014, Japan","institution_ids":["https://openalex.org/I4210143797"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210143797"],"apc_list":null,"apc_paid":null,"fwci":0.4685,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.53428699,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":"45","issue":null,"first_page":"20","last_page":"21"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.989300012588501,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.989300012588501,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.006500000134110451,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.0005000000237487257,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/n-mosfet","display_name":"nMOSFET","score":0.9049999713897705},{"id":"https://openalex.org/keywords/gate-last-process","display_name":"gate-last process","score":0.8510000109672546},{"id":"https://openalex.org/keywords/channel-stress","display_name":"channel stress","score":0.7020000219345093}],"concepts":[{"id":"https://openalex.org/C116372231","wikidata":"https://www.wikidata.org/wiki/Q605757","display_name":"Copper interconnect","level":3,"score":0.9069877862930298},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.8567312955856323},{"id":"https://openalex.org/C21036866","wikidata":"https://www.wikidata.org/wiki/Q181767","display_name":"Stress (linguistics)","level":2,"score":0.6472026705741882},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.5479601621627808},{"id":"https://openalex.org/C112950240","wikidata":"https://www.wikidata.org/wiki/Q76005","display_name":"Ultimate tensile strength","level":2,"score":0.50648033618927},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.5035657286643982},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5034798979759216},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.43925657868385315},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.3542149066925049},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29542285203933716},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2621679902076721},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09919354319572449},{"id":"https://openalex.org/C133386390","wikidata":"https://www.wikidata.org/wiki/Q184996","display_name":"Dielectric","level":2,"score":0.07424268126487732},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.05825725197792053},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.054000407457351685},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vtsa.2009.5159273","doi":"https://doi.org/10.1109/vtsa.2009.5159273","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vtsa.2009.5159273","pdf_url":null,"source":{"id":"https://openalex.org/S7407086210","display_name":"International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Symposium on VLSI Technology, Systems, and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4943999946117401,"display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2086169241"],"related_works":["https://openalex.org/W2122093418","https://openalex.org/W2171134093","https://openalex.org/W2166577149","https://openalex.org/W2159960505","https://openalex.org/W2079749975","https://openalex.org/W2166413230","https://openalex.org/W2072835119","https://openalex.org/W143125790","https://openalex.org/W2310124757","https://openalex.org/W2106134316"],"abstract_inverted_index":{"Local":[0],"channel":[1,20,43,55,69,87],"stress":[2,12,29,44,96],"behaviors":[3],"induced":[4],"by":[5,26,94],"the":[6,19,37,46,51,54,57,86,95,100],"combination":[7],"of":[8,53,73,89,99],"top-cut":[9],"tensile":[10,42],"SiN":[11],"liner":[13],"and":[14,31,85],"damascene-gate":[15,65,101],"(gate-last)":[16],"process":[17],"on":[18],"width":[21,88],"for":[22,64],"nFETs":[23,66],"are":[24],"investigated":[25],"using":[27],"3D":[28],"simulations":[30],"demonstrations.":[32],"It":[33],"is":[34,62,92],"found":[35],"that":[36],"dummy-gate":[38],"removal":[39],"enhances":[40],"high":[41],"along":[45],"gate":[47],"length,":[48],"especially":[49],"at":[50,76],"edge":[52],"beside":[56],"STI.":[58],"Therefore,":[59],"drivability":[60],"enhancement":[61,97],"performed":[63],"with":[67],"narrow":[68],"width.":[70],"High-drive":[71],"current":[72],"1430":[74],"muA/mum":[75],"Ioff":[77],"=":[78,82],"100":[79],"nA/um,":[80],"Vdd":[81],"1.0":[83],"V":[84],"0.3":[90],"um":[91],"achieved":[93],"effects":[98],"technology.":[102]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-11-01T11:40:01.658920","created_date":"2016-06-24T00:00:00"}