{"id":"https://openalex.org/W2020787948","doi":"https://doi.org/10.1109/tcad.2014.2379630","title":"A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise","display_name":"A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise","publication_year":2014,"publication_date":"2014-12-10","ids":{"openalex":"https://openalex.org/W2020787948","doi":"https://doi.org/10.1109/tcad.2014.2379630","mag":"2020787948"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2014.2379630","doi":"https://doi.org/10.1109/tcad.2014.2379630","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2014.2379630","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102148183","display_name":"Po-Hsun Wu","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Po-Hsun Wu","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020643571","display_name":"Mark Po-Hung Lin","orcid":"https://orcid.org/0000-0003-2292-2308","observed_orcids":["https://orcid.org/0000-0003-2292-2308"]},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Mark Po-Hung Lin","raw_affiliation_strings":["Department of Electrical Engineering and Advanced Institute of Manufacturing with High-tech Innovations, National Chung Cheng University, Chiayi, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Advanced Institute of Manufacturing with High-tech Innovations, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089860877","display_name":"Tung-Chieh Chen","orcid":"https://orcid.org/0009-0000-3163-3634","observed_orcids":["https://orcid.org/0009-0000-3163-3634"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tung-Chieh Chen","raw_affiliation_strings":["Synopsys, Inc., Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":null,"display_name":"Ching-Feng Yeh","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ching-Feng Yeh","raw_affiliation_strings":["Department of Electrical Engineering and Advanced Institute of Manufacturing with High-tech Innovations, National Chung Cheng University, Chiayi, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Advanced Institute of Manufacturing with High-tech Innovations, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100353869","display_name":"Xin Li","orcid":"https://orcid.org/0000-0002-4510-2436","observed_orcids":["https://orcid.org/0000-0002-4510-2436","https://orcid.org/0000-0002-0130-1871"]},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xin Li","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062800747","display_name":"Tsung-Yi Ho","orcid":"https://orcid.org/0000-0001-7348-5625","observed_orcids":["https://orcid.org/0000-0001-7348-5625"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tsung-Yi Ho","raw_affiliation_strings":["Department of Computer Science, National Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":1.3802,"has_fulltext":false,"cited_by_count":57,"citation_normalized_percentile":{"value":0.82444704,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":99},"biblio":{"volume":"34","issue":"2","first_page":"199","last_page":"212"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/physical-synthesis","display_name":"physical synthesis","score":0.9290000200271606},{"id":"https://openalex.org/keywords/analog-circuits","display_name":"analog circuits","score":0.4779999852180481},{"id":"https://openalex.org/keywords/layout-generation","display_name":"layout generation","score":0.5899999737739563},{"id":"https://openalex.org/keywords/design-expertise","display_name":"design expertise","score":0.5479999780654907},{"id":"https://openalex.org/keywords/placement-and-routing","display_name":"placement and routing","score":0.7059999704360962}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.705136239528656},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.6830548048019409},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5481857657432556},{"id":"https://openalex.org/C188985296","wikidata":"https://www.wikidata.org/wiki/Q868954","display_name":"Page layout","level":2,"score":0.5347487330436707},{"id":"https://openalex.org/C2781235140","wikidata":"https://www.wikidata.org/wiki/Q275131","display_name":"Scratch","level":2,"score":0.5041412115097046},{"id":"https://openalex.org/C5546195","wikidata":"https://www.wikidata.org/wiki/Q5969842","display_name":"IC layout editor","level":5,"score":0.4898657500743866},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4885331392288208},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.4447409212589264},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4387241303920746},{"id":"https://openalex.org/C179145894","wikidata":"https://www.wikidata.org/wiki/Q5264353","display_name":"Design layout record","level":5,"score":0.42419883608818054},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.4102845788002014},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3601415455341339},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.34431490302085876},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.23668041825294495},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.19314143061637878},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18155181407928467},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.18058711290359497},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12230977416038513},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C112698675","wikidata":"https://www.wikidata.org/wiki/Q37038","display_name":"Advertising","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2014.2379630","doi":"https://doi.org/10.1109/tcad.2014.2379630","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2014.2379630","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5378999710083008,"display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":62,"referenced_works":["https://openalex.org/W129336209","https://openalex.org/W165772547","https://openalex.org/W1553533745","https://openalex.org/W1554522304","https://openalex.org/W1927407638","https://openalex.org/W1974032838","https://openalex.org/W1974278299","https://openalex.org/W1976234067","https://openalex.org/W1983606985","https://openalex.org/W1987650367","https://openalex.org/W1996043836","https://openalex.org/W1996605065","https://openalex.org/W1997844401","https://openalex.org/W1999531316","https://openalex.org/W2003837070","https://openalex.org/W2004655383","https://openalex.org/W2015090561","https://openalex.org/W2016160133","https://openalex.org/W2019141022","https://openalex.org/W2024060531","https://openalex.org/W2034646262","https://openalex.org/W2037554918","https://openalex.org/W2039730318","https://openalex.org/W2043503568","https://openalex.org/W2065257040","https://openalex.org/W2070836216","https://openalex.org/W2078717290","https://openalex.org/W2083156195","https://openalex.org/W2097799663","https://openalex.org/W2098505485","https://openalex.org/W2106241469","https://openalex.org/W2108229403","https://openalex.org/W2109628924","https://openalex.org/W2113329856","https://openalex.org/W2125447762","https://openalex.org/W2126992288","https://openalex.org/W2126996785","https://openalex.org/W2127708750","https://openalex.org/W2128871015","https://openalex.org/W2134152592","https://openalex.org/W2138398184","https://openalex.org/W2141019759","https://openalex.org/W2141750279","https://openalex.org/W2141964723","https://openalex.org/W2146875007","https://openalex.org/W2149029467","https://openalex.org/W2164300970","https://openalex.org/W2256863758","https://openalex.org/W2543985963","https://openalex.org/W3136963889","https://openalex.org/W3138662266","https://openalex.org/W3142330788","https://openalex.org/W3144327609","https://openalex.org/W3145854928","https://openalex.org/W3150574859","https://openalex.org/W4230996772","https://openalex.org/W4239070732","https://openalex.org/W4242618871","https://openalex.org/W4247078132","https://openalex.org/W4249900664","https://openalex.org/W4255740574","https://openalex.org/W6628665703"],"related_works":["https://openalex.org/W1922010483","https://openalex.org/W2108477391","https://openalex.org/W2078139059","https://openalex.org/W2100529161","https://openalex.org/W3110969908","https://openalex.org/W2102676394","https://openalex.org/W3009195793","https://openalex.org/W1973442849","https://openalex.org/W2102933388","https://openalex.org/W2164894651"],"abstract_inverted_index":{"Analog":[0],"layout":[1,16,24,56,127,134],"design":[2,17,51,57,75,84,106],"has":[3],"been":[4],"a":[5,20],"manual,":[6],"time-consuming,":[7],"and":[8,31,42,89,96,99,130],"error-prone":[9],"task":[10],"for":[11,19,103],"decades.":[12],"To":[13],"speed":[14],"up":[15],"time":[18],"new":[21,70,95,105],"design,":[22],"analog":[23],"designers":[25],"prefer":[26],"referring":[27],"to":[28,68],"legacy":[29,46,83,97,111],"designs":[30],"layouts":[32,47,71,102,112],"rather":[33],"than":[34],"starting":[35],"from":[36],"scratch,":[37],"or":[38],"thoroughly":[39],"applying":[40],"placement":[41],"routing":[43],"tools":[44],"because":[45],"contain":[48],"pretty":[49],"much":[50,114],"expertise.":[52,76],"Motivated":[53],"by":[54,72,107],"such":[55],"process,":[58],"this":[59],"paper":[60],"presents":[61],"the":[62,104,109,121,132],"first":[63],"knowledge-based":[64],"physical":[65],"synthesis":[66],"methodology":[67,123],"generate":[69,100],"integrating":[73],"existent":[74],"The":[77],"proposed":[78,122],"approach":[79],"can":[80,124,136],"automatically":[81],"analyze":[82],"data":[85],"including":[86],"circuits,":[87],"layouts,":[88],"constraints,":[90],"extract":[91],"matched":[92],"sub-circuits":[93],"between":[94],"designs,":[98],"multiple":[101],"utilizing":[108],"quality-approved":[110],"as":[113,115],"possible.":[116],"Experimental":[117],"results":[118],"show":[119],"that":[120],"achieve":[125],"high":[126],"reusage":[128],"rate,":[129],"hence":[131],"designers'":[133],"preference":[135],"be":[137],"successfully":[138],"reserved.":[139]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":9},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":8},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":1}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}