{"id":"https://openalex.org/W2018266897","doi":"https://doi.org/10.1155/2001/53729","title":"A Size\u2010optimization Design for Variable Length Coding Using Distributed Logic","display_name":"A Size\u2010optimization Design for Variable Length Coding Using Distributed Logic","publication_year":1999,"publication_date":"1999-10-14","ids":{"openalex":"https://openalex.org/W2018266897","doi":"https://doi.org/10.1155/2001/53729","mag":"2018266897"},"language":"en","primary_location":{"id":"doi:10.1155/2001/53729","doi":"https://doi.org/10.1155/2001/53729","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2001/53729","pdf_url":"https://downloads.hindawi.com/archive/2001/053729.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","poland-40"],"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/2001/053729.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051387525","display_name":"Shih\u2010Chang Hsia","orcid":"https://orcid.org/0000-0001-9828-0773","observed_orcids":["https://orcid.org/0000-0001-9828-0773"]},"institutions":[{"id":"https://openalex.org/I109289231","display_name":"National Kaohsiung First University of Science and Technology","ror":"https://ror.org/03858r716","country_code":"TW","type":"education","lineage":["https://openalex.org/I109289231","https://openalex.org/I4387154394"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Shih-Chang Hsia","raw_affiliation_strings":["Department of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology","institution_ids":["https://openalex.org/I109289231"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085387617","display_name":"Chien\u2010Cheng Tseng","orcid":"https://orcid.org/0000-0002-4235-8567","observed_orcids":["https://orcid.org/0000-0002-4235-8567"]},"institutions":[{"id":"https://openalex.org/I109289231","display_name":"National Kaohsiung First University of Science and Technology","ror":"https://ror.org/03858r716","country_code":"TW","type":"education","lineage":["https://openalex.org/I109289231","https://openalex.org/I4387154394"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chien-Cheng Tseng","raw_affiliation_strings":["Department of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology","institution_ids":["https://openalex.org/I109289231"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5051387525"],"corresponding_institution_ids":["https://openalex.org/I109289231"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"12","issue":"1","first_page":"61","last_page":"68"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.5605000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.5605000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.1687999963760376,"subfield":{"id":"https://openalex.org/subfields/2614","display_name":"Theoretical Computer Science"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.11890000104904175,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/variable-length-coding","display_name":"variable-length codes","score":0.9990000128746033},{"id":"https://openalex.org/keywords/distributed-logic","display_name":"distributed logic","score":0.7979999780654907},{"id":"https://openalex.org/keywords/vlsi-architecture","display_name":"VLSI architecture","score":0.9309999942779541},{"id":"https://openalex.org/keywords/transistor-count-reduction","display_name":"transistor count reduction","score":0.7590000033378601},{"id":"https://openalex.org/keywords/cell-based-design","display_name":"cell-based design","score":0.8130000233650208}],"concepts":[{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.5794475674629211},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5198084115982056},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.49422863125801086},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.354328989982605},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.34889882802963257},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3439537286758423},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3374248147010803},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.1438966691493988},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/2001/53729","doi":"https://doi.org/10.1155/2001/53729","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2001/53729","pdf_url":"https://downloads.hindawi.com/archive/2001/053729.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","poland-40"],"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/2001/53729","doi":"https://doi.org/10.1155/2001/53729","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2001/53729","pdf_url":"https://downloads.hindawi.com/archive/2001/053729.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","poland-40"],"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2018266897.pdf","grobid_xml":"https://content.openalex.org/works/W2018266897.grobid-xml"},"referenced_works_count":10,"referenced_works":["https://openalex.org/W1968105141","https://openalex.org/W1984814295","https://openalex.org/W2038649859","https://openalex.org/W2107745473","https://openalex.org/W2115340884","https://openalex.org/W2132630368","https://openalex.org/W2143275250","https://openalex.org/W2154524060","https://openalex.org/W2163212373","https://openalex.org/W4230028481"],"related_works":["https://openalex.org/W2115340884","https://openalex.org/W2109786467","https://openalex.org/W2110127124","https://openalex.org/W1984814295","https://openalex.org/W2243186837","https://openalex.org/W2373631676","https://openalex.org/W2107563009","https://openalex.org/W2100610760","https://openalex.org/W2049919593","https://openalex.org/W2155992391"],"abstract_inverted_index":{"In":[0,33,56],"this":[1,18,57],"paper,":[2],"we":[3,43],"first":[4],"employ":[5],"an":[6],"efficient":[7],"approach":[8],"to":[9,13,26,35],"reduce":[10],"the":[11,54,59,70,81,92,96,103],"time":[12],"construct":[14],"a":[15,20],"codeword.":[16],"With":[17],"codeword,":[19],"novel":[21],"VLSI":[22],"architecture":[23],"is":[24,63,69,80,90,109],"proposed":[25,97,107],"realize":[27],"highspeed":[28],"Variable":[29],"Length":[30],"Coding":[31],"(VLC).":[32],"order":[34,74],"combine":[36],"with":[37],"other":[38],"circuits":[39],"using":[40],"cell\u2010based":[41],"design,":[42],"adopt":[44],"distributed":[45],"logic":[46],"rather":[47],"than":[48],"memory":[49],"devices":[50],"(ROM,":[51],"PLA)":[52],"for":[53,76,84],"implementation.":[55],"architecture,":[58],"VLC":[60],"coding":[61],"scheme":[62],"partitioned":[64],"into":[65],"two":[66],"parts,":[67],"one":[68],"codeword":[71,82,86],"length":[72],"and":[73,112,119],"index":[75],"bit":[77],"control,":[78],"another":[79],"bank":[83],"actual":[85],"generation.":[87],"The":[88],"advantage":[89],"that":[91,115],"circuit":[93],"size":[94],"of":[95,106,114,116],"method":[98,108],"can":[99],"be":[100],"reduced,":[101],"where":[102],"transistor":[104],"count":[105],"only":[110],"1/2":[111],"1/4":[113],"ROM\u2010":[117],"based":[118],"PLA\u2010based":[120],"in":[121],"average,":[122],"respectively.":[123]},"counts_by_year":[],"updated_date":"2026-10-16T09:59:22.235173","created_date":"2016-06-24T00:00:00"}
