{"id":"https://openalex.org/W2017410652","doi":"https://doi.org/10.1007/s10470-013-0192-x","title":"Mixed signal SIMD processor array vision chip for real-time image processing","display_name":"Mixed signal SIMD processor array vision chip for real-time image processing","publication_year":2013,"publication_date":"2013-10-30","ids":{"openalex":"https://openalex.org/W2017410652","doi":"https://doi.org/10.1007/s10470-013-0192-x","mag":"2017410652"},"language":"en","primary_location":{"id":"doi:10.1007/s10470-013-0192-x","doi":"https://doi.org/10.1007/s10470-013-0192-x","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s10470-013-0192-x","pdf_url":"https://link.springer.com/content/pdf/10.1007/s10470-013-0192-x.pdf","source":{"id":"https://openalex.org/S76600781","display_name":"Analog Integrated Circuits and Signal Processing","issn_l":"0925-1030","issn":["0925-1030","1573-1979"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-d","jufo-1","ki-jl-1","norway-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Analog Integrated Circuits and Signal Processing","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://link.springer.com/content/pdf/10.1007/s10470-013-0192-x.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101091454","display_name":"Stephen J. Carey","orcid":"https://orcid.org/0000-0002-0221-6871","observed_orcids":["https://orcid.org/0000-0002-0221-6871"]},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Stephen J. Carey","raw_affiliation_strings":["School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","institution_ids":["https://openalex.org/I28407311"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL","institution_ids":["https://openalex.org/I28407311"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111664186","display_name":"David R. W. Barr","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"David R. W. Barr","raw_affiliation_strings":["School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","institution_ids":["https://openalex.org/I28407311"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL","institution_ids":["https://openalex.org/I28407311"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102025141","display_name":"Bin Wang","orcid":"https://orcid.org/0000-0003-3213-5199","observed_orcids":["https://orcid.org/0000-0003-3213-5199"]},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Bin Wang","raw_affiliation_strings":["School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","institution_ids":["https://openalex.org/I28407311"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL","institution_ids":["https://openalex.org/I28407311"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034024301","display_name":"Alexey Lopich","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Alexey Lopich","raw_affiliation_strings":["School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","institution_ids":["https://openalex.org/I28407311"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL","institution_ids":["https://openalex.org/I28407311"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057658631","display_name":"Piotr Dudek","orcid":"https://orcid.org/0000-0002-6511-6165","observed_orcids":["https://orcid.org/0000-0002-6511-6165","https://orcid.org/0000-0001-8253-9787"]},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Piotr Dudek","raw_affiliation_strings":["School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL, UK","institution_ids":["https://openalex.org/I28407311"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering, The University of Manchester, Manchester, UK, M13 9PL","institution_ids":["https://openalex.org/I28407311"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5101091454"],"corresponding_institution_ids":["https://openalex.org/I28407311"],"apc_list":{"value":3290,"currency":"USD","value_usd":3290},"apc_paid":{"value":3290,"currency":"USD","value_usd":3290},"fwci":0.5893,"has_fulltext":true,"cited_by_count":18,"citation_normalized_percentile":{"value":0.71837053,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":98},"biblio":{"volume":"77","issue":"3","first_page":"385","last_page":"399"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.5029000043869019,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.5029000043869019,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.22599999606609344,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.07410000264644623,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/vision-chip","display_name":"vision chip","score":0.9049999713897705},{"id":"https://openalex.org/keywords/mixed-signal-processing","display_name":"mixed-signal processing","score":0.6449999809265137},{"id":"https://openalex.org/keywords/real-time-image-processing","display_name":"real-time image processing","score":0.9390000104904175},{"id":"https://openalex.org/keywords/shape-recognition","display_name":"shape recognition","score":0.6930000185966492},{"id":"https://openalex.org/keywords/cmos-chip","display_name":"CMOS integrated circuit","score":0.46000000834465027},{"id":"https://openalex.org/keywords/parallel-processing-elements","display_name":"parallel processing elements","score":0.3100000023841858}],"concepts":[{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.666201651096344},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6538084745407104},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5985094904899597},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.5812921524047852},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.5802254676818848},{"id":"https://openalex.org/C161824985","wikidata":"https://www.wikidata.org/wiki/Q919509","display_name":"Vector processor","level":2,"score":0.529088020324707},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5110117197036743},{"id":"https://openalex.org/C2776189500","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Processor array","level":2,"score":0.4909515678882599},{"id":"https://openalex.org/C52027705","wikidata":"https://www.wikidata.org/wiki/Q6805986","display_name":"Media processor","level":4,"score":0.4467792212963104},{"id":"https://openalex.org/C2775941181","wikidata":"https://www.wikidata.org/wiki/Q861004","display_name":"Image processor","level":4,"score":0.44578659534454346},{"id":"https://openalex.org/C2778545087","wikidata":"https://www.wikidata.org/wiki/Q4795883","display_name":"Array processing","level":4,"score":0.4432751536369324},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.42671722173690796},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.40008583664894104},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.38536539673805237},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.37743961811065674},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.27142345905303955},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.19438424706459045},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.18153423070907593},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10297766327857971}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/s10470-013-0192-x","doi":"https://doi.org/10.1007/s10470-013-0192-x","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s10470-013-0192-x","pdf_url":"https://link.springer.com/content/pdf/10.1007/s10470-013-0192-x.pdf","source":{"id":"https://openalex.org/S76600781","display_name":"Analog Integrated Circuits and Signal Processing","issn_l":"0925-1030","issn":["0925-1030","1573-1979"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-d","jufo-1","ki-jl-1","norway-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Analog Integrated Circuits and Signal Processing","raw_type":"journal-article"},{"id":"pmh:oai:pure.atira.dk:openaire_cris_publications/d9ae4ee8-79f5-472f-963e-d707d0e8dd02","doi":null,"is_oa":false,"landing_page_url":"https://research.manchester.ac.uk/en/publications/d9ae4ee8-79f5-472f-963e-d707d0e8dd02","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Carey, S J, Barr, D R W, Wang, B, Lopich, A & Dudek, P 2013, 'Mixed signal SIMD processor array vision chip for real-time image processing', Analog Integrated Circuits and Signal Processing, vol. 77, no. 3, pp. 385-399. https://doi.org/10.1007/s10470-013-0192-x","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"doi:10.1007/s10470-013-0192-x","doi":"https://doi.org/10.1007/s10470-013-0192-x","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s10470-013-0192-x","pdf_url":"https://link.springer.com/content/pdf/10.1007/s10470-013-0192-x.pdf","source":{"id":"https://openalex.org/S76600781","display_name":"Analog Integrated Circuits and Signal Processing","issn_l":"0925-1030","issn":["0925-1030","1573-1979"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-d","jufo-1","ki-jl-1","norway-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Analog Integrated Circuits and Signal Processing","raw_type":"journal-article"},"sustainable_development_goals":[],"study_designs":[],"awards":[{"id":"https://openalex.org/G3087645368","display_name":"Fine-Grain Parallel Cellular Processor Arrays in 3D Silicon Technologies","funder_award_id":"EP/H017453/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2017410652.pdf","grobid_xml":"https://content.openalex.org/works/W2017410652.grobid-xml"},"referenced_works_count":35,"referenced_works":["https://openalex.org/W42362621","https://openalex.org/W205335040","https://openalex.org/W606713757","https://openalex.org/W615378444","https://openalex.org/W1007778403","https://openalex.org/W1510619790","https://openalex.org/W1967767497","https://openalex.org/W1970380784","https://openalex.org/W1981911897","https://openalex.org/W1989328666","https://openalex.org/W2010163600","https://openalex.org/W2017170122","https://openalex.org/W2024708898","https://openalex.org/W2025147050","https://openalex.org/W2029739655","https://openalex.org/W2047391257","https://openalex.org/W2064011705","https://openalex.org/W2066547593","https://openalex.org/W2069363022","https://openalex.org/W2081908685","https://openalex.org/W2098703979","https://openalex.org/W2117444827","https://openalex.org/W2126820952","https://openalex.org/W2131693273","https://openalex.org/W2131785162","https://openalex.org/W2139946453","https://openalex.org/W2142639946","https://openalex.org/W2156571376","https://openalex.org/W2165352122","https://openalex.org/W2172167711","https://openalex.org/W2327347559","https://openalex.org/W2534829689","https://openalex.org/W2539069741","https://openalex.org/W2798501834","https://openalex.org/W4239979250"],"related_works":["https://openalex.org/W2534829689","https://openalex.org/W7207013738","https://openalex.org/W2126820952","https://openalex.org/W2117347589","https://openalex.org/W1554995239","https://openalex.org/W2131785162","https://openalex.org/W2564731327","https://openalex.org/W2111730644","https://openalex.org/W1567049177","https://openalex.org/W2174624617"],"abstract_inverted_index":{"A":[0],"prototype":[1],"vision":[2],"chip":[3,90,106],"has":[4],"been":[5],"designed":[6],"that":[7],"incorporates":[8],"a":[9,18],"20":[10],"\u00d7":[11],"64":[12],"array":[13,60],"of":[14,28,45,58,79],"processing":[15],"elements":[16],"on":[17],"31":[19],"\u03bcm":[20,111],"pitch.":[21],"Each":[22],"processor":[23],"element":[24],"includes":[25],"14":[26],"bits":[27],"digital":[29],"memory":[30],"in":[31,52,109],"addition":[32],"to":[33,75,91],"seven":[34],"analogue":[35,54],"registers.":[36],"Digital":[37],"operands":[38],"include":[39],"NOR":[40],"and":[41,49,97],"NOT":[42],"with":[43,77],"operations":[44,70],"diffusion,":[46],"subtraction,":[47],"inversion":[48],"squaring":[50],"available":[51],"the":[53,59,83,89,93],"domain.":[55],"The":[56,105],"cells":[57],"can":[61],"be":[62],"configured":[63],"as":[64,72],"an":[65],"asynchronous":[66],"propagation":[67],"network":[68],"allowing":[69],"such":[71],"flood":[73],"filling":[74],"occur":[76],"times":[78],"~1":[80],"\u03bcs":[81],"across":[82],"array.":[84],"Exploiting":[85],"this":[86],"feature":[87],"allows":[88],"recognise":[92],"difference":[94],"between":[95],"closed":[96],"open":[98],"shapes":[99],"at":[100],"30,000":[101],"frames":[102],"per":[103],"second.":[104],"is":[107],"fabricated":[108],"0.18":[110],"CMOS":[112],"technology.":[113]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-11-03T10:50:19.383937","created_date":"2016-06-24T00:00:00"}