{"id":"https://openalex.org/W2016101289","doi":"https://doi.org/10.1109/vlsi-sata.2015.7050471","title":"New fault model analysis for embedded SRAM cell for deep submicron technologies using parasitic extraction method","display_name":"New fault model analysis for embedded SRAM cell for deep submicron technologies using parasitic extraction method","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W2016101289","doi":"https://doi.org/10.1109/vlsi-sata.2015.7050471","mag":"2016101289"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-sata.2015.7050471","doi":"https://doi.org/10.1109/vlsi-sata.2015.7050471","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-sata.2015.7050471","pdf_url":null,"source":{"id":"https://openalex.org/S7407086218","display_name":"IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008030003","display_name":"Muddapu Parvathi","orcid":"https://orcid.org/0000-0002-0564-3094","observed_orcids":["https://orcid.org/0000-0002-0564-3094"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Parvathi","raw_affiliation_strings":["ECE Dept, Stanley College of Engineering and Technology for Women, Hyderabad, AP, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE Dept, Stanley College of Engineering and Technology for Women, Hyderabad, AP, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053120918","display_name":"N Vasantha","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"N. Vasantha","raw_affiliation_strings":["IT Department, Vasavi College of Engineering, Hyderabad, AP, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IT Department, Vasavi College of Engineering, Hyderabad, AP, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088565237","display_name":"K. Satya Prasad","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I142809039","display_name":"Jawaharlal Nehru Technological University, Kakinada","ror":"https://ror.org/05s9t8c95","country_code":"IN","type":"education","lineage":["https://openalex.org/I142809039"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"K. Satya Prasad","raw_affiliation_strings":["Electronics and Communication Engineering, JNTUK, Kakinada, AP, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Communication Engineering, JNTUK, Kakinada, AP, India","institution_ids":["https://openalex.org/I142809039"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2208,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.39206642,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":94},"biblio":{"volume":"3","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.0006000000284984708,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.00019999999494757503,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sram-testing","display_name":"SRAM testing","score":0.7089999914169312},{"id":"https://openalex.org/keywords/fault-models","display_name":"fault models","score":0.8360000252723694},{"id":"https://openalex.org/keywords/parasitic-extraction","display_name":"parasitic extraction","score":0.8289999961853027},{"id":"https://openalex.org/keywords/fault-location-identification","display_name":"fault location estimation","score":0.9110000133514404},{"id":"https://openalex.org/keywords/deep-submicron-technology","display_name":"deep submicron technology","score":0.7350000143051147},{"id":"https://openalex.org/keywords/0-18-mum-cmos","display_name":"0.18 \u03bcm CMOS","score":0.7730000019073486},{"id":"https://openalex.org/keywords/march-algorithm","display_name":"March algorithms","score":0.671999990940094},{"id":"https://openalex.org/keywords/parasitic-effects","display_name":"parasitic effects","score":0.6380000114440918}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8143948316574097},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6885205507278442},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.6622862219810486},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6620018482208252},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.576474666595459},{"id":"https://openalex.org/C13625343","wikidata":"https://www.wikidata.org/wiki/Q7627418","display_name":"Stuck-at fault","level":4,"score":0.5451235175132751},{"id":"https://openalex.org/C167391956","wikidata":"https://www.wikidata.org/wiki/Q1401211","display_name":"Fault model","level":3,"score":0.5334081649780273},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4284365773200989},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.41852840781211853},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39705726504325867},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.38579851388931274},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2750294804573059},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23751047253608704},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.20689108967781067},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19262146949768066},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09826916456222534},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-sata.2015.7050471","doi":"https://doi.org/10.1109/vlsi-sata.2015.7050471","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-sata.2015.7050471","pdf_url":null,"source":{"id":"https://openalex.org/S7407086218","display_name":"IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W2096814918","https://openalex.org/W2109356829","https://openalex.org/W2109857771","https://openalex.org/W2123892915","https://openalex.org/W2126750376","https://openalex.org/W2136759973","https://openalex.org/W2136867796","https://openalex.org/W2150068225","https://openalex.org/W2156773710","https://openalex.org/W2161390709","https://openalex.org/W2168662569","https://openalex.org/W2314416650"],"related_works":["https://openalex.org/W4386223532","https://openalex.org/W2525798501","https://openalex.org/W7096658350","https://openalex.org/W2314099613","https://openalex.org/W4283014680","https://openalex.org/W3191561954","https://openalex.org/W4411230704","https://openalex.org/W4210655672","https://openalex.org/W2005450058","https://openalex.org/W2112727903"],"abstract_inverted_index":{"A":[0,111],"bit":[1],"difficult":[2],"task":[3],"is":[4,43,117],"to":[5,158],"identify":[6],"better":[7],"fit":[8],"algorithms":[9,60,88],"for":[10,32,103,115],"testing":[11],"complex":[12],"circuits":[13],"such":[14],"as":[15,125],"SRAMs":[16],"in":[17,54,91,119,128,148],"the":[18,33,48,64,72,85,121,129,132,143,186,196],"fast":[19],"growing":[20],"technology":[21,197],"environment.":[22],"Many":[23],"fault":[24,50,65,104,108,113,150,177,189],"models":[25,51],"have":[26],"emerged":[27],"but":[28],"limitations":[29],"and":[30,75,84,138,167,199],"constraints":[31],"given":[34],"test":[35,87,145,153],"environment":[36],"restrict":[37],"their":[38],"freedom":[39],"of":[40,47,56,81,131,155,176,188,195],"utilization.":[41],"It":[42],"observed":[44],"that":[45,175],"majority":[46],"existing":[49],"were":[52],"analyzed":[53],"terms":[55],"well":[57],"known":[58],"March":[59],"which":[61,120],"give":[62],"only":[63],"detection":[66,105],"information.":[67],"Scale":[68],"down":[69],"technologies":[70],"influence":[71],"parasitic":[73,170,182],"effects":[74],"this":[76,95],"causes":[77],"an":[78],"additional":[79],"source":[80],"faulty":[82,122],"behavior":[83],"present":[86],"become":[89],"weak":[90],"encountering":[92],"them.":[93],"In":[94],"paper":[96],"we":[97],"propose":[98],"a":[99],"layout":[100,130],"dependent":[101],"method":[102,146,184],"along":[106,190],"with":[107,174,191],"location":[109,193],"identification.":[110],"new":[112],"model":[114,123],"SRAM":[116,133],"presented":[118],"reflects":[124],"local":[126],"disturbances":[127],"cell.":[134],"Two":[135],"technologies,":[136],"180nm":[137],"120nm,":[139],"are":[140,165,172],"considered.":[141],"Applying":[142],"proposed":[144,181],"resulted":[147],"100%":[149],"coverage.":[151],"The":[152,169,180],"results":[154],"submicron":[156],"(180nm)":[157],"deep":[159],"sub":[160],"micron":[161],"(120nm)":[162],"variation":[163],"levels":[164],"tabulated":[166],"analyzed.":[168],"variations":[171],"compared":[173],"free":[178],"SRAM.":[179],"extraction":[183],"identifies":[185],"type":[187],"its":[192],"independent":[194],"(180nm":[198],"120nm)":[200],"selected.":[201]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-10-28T10:33:24.094632","created_date":"2016-06-24T00:00:00"}
