{"id":"https://openalex.org/W2012843580","doi":"https://doi.org/10.1109/tsp.2012.6256316","title":"An evolutionary approach to design and calibration of reconfigurable OTA-C filters","display_name":"An evolutionary approach to design and calibration of reconfigurable OTA-C filters","publication_year":2012,"publication_date":"2012-07-01","ids":{"openalex":"https://openalex.org/W2012843580","doi":"https://doi.org/10.1109/tsp.2012.6256316","mag":"2012843580"},"language":"en","primary_location":{"id":"doi:10.1109/tsp.2012.6256316","doi":"https://doi.org/10.1109/tsp.2012.6256316","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsp.2012.6256316","pdf_url":null,"source":{"id":"https://openalex.org/S7407087289","display_name":"International Conference on Telecommunications and Signal Processing (TSP)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 35th International Conference on Telecommunications and Signal Processing (TSP)","raw_type":"proceedings-article"},"parent_works":[],"lineage":["https://openalex.org/W2012843580"],"child_works_count":0,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031323885","display_name":"Paul Farag\u00f3","orcid":"https://orcid.org/0000-0001-7824-8506","observed_orcids":["https://orcid.org/0000-0001-7824-8506"]},"institutions":[{"id":"https://openalex.org/I158333966","display_name":"Technical University of Cluj-Napoca","ror":"https://ror.org/03r8nwp71","country_code":"RO","type":"education","lineage":["https://openalex.org/I158333966"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Paul Farago","raw_affiliation_strings":["Technical University of Cluj Napoca, Romania, Romania","Technical University of Cluj- Napoca, Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Cluj Napoca, Romania, Romania","institution_ids":["https://openalex.org/I158333966"]},{"raw_affiliation_string":"Technical University of Cluj- Napoca, Romania","institution_ids":["https://openalex.org/I158333966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070720360","display_name":"Gabor Csipkes","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I158333966","display_name":"Technical University of Cluj-Napoca","ror":"https://ror.org/03r8nwp71","country_code":"RO","type":"education","lineage":["https://openalex.org/I158333966"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Gabor Csipkes","raw_affiliation_strings":["Technical University of Cluj Napoca, Romania, Romania","Technical University of Cluj- Napoca, Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Cluj Napoca, Romania, Romania","institution_ids":["https://openalex.org/I158333966"]},{"raw_affiliation_string":"Technical University of Cluj- Napoca, Romania","institution_ids":["https://openalex.org/I158333966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027221031","display_name":"Doris Csipkes","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I158333966","display_name":"Technical University of Cluj-Napoca","ror":"https://ror.org/03r8nwp71","country_code":"RO","type":"education","lineage":["https://openalex.org/I158333966"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Doris Csipkes","raw_affiliation_strings":["Technical University of Cluj Napoca, Romania, Romania","Technical University of Cluj- Napoca, Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Cluj Napoca, Romania, Romania","institution_ids":["https://openalex.org/I158333966"]},{"raw_affiliation_string":"Technical University of Cluj- Napoca, Romania","institution_ids":["https://openalex.org/I158333966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076531917","display_name":"Sorin Hintea","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I158333966","display_name":"Technical University of Cluj-Napoca","ror":"https://ror.org/03r8nwp71","country_code":"RO","type":"education","lineage":["https://openalex.org/I158333966"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Sorin Hintea","raw_affiliation_strings":["Technical University of Cluj Napoca, Romania, Romania","Technical University of Cluj- Napoca, Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Cluj Napoca, Romania, Romania","institution_ids":["https://openalex.org/I158333966"]},{"raw_affiliation_string":"Technical University of Cluj- Napoca, Romania","institution_ids":["https://openalex.org/I158333966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I158333966"],"apc_list":null,"apc_paid":null,"fwci":1.6207,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.79695515,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"1","issue":null,"first_page":"363","last_page":"368"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.6044999957084656,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.6044999957084656,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.3402999937534332,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.009999999776482582,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/ota-c-filters","display_name":"OTA-C filters","score":0.7710000276565552},{"id":"https://openalex.org/keywords/reconfigurable-filter","display_name":"reconfigurable filter","score":0.7710000276565552},{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"field programmable analog array","score":0.9169999957084656},{"id":"https://openalex.org/keywords/adaptive-filtering","display_name":"adaptive filtering","score":0.6690000295639038},{"id":"https://openalex.org/keywords/filter-calibration","display_name":"filter calibration","score":0.6019999980926514},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"phase-locked loop","score":0.8299999833106995},{"id":"https://openalex.org/keywords/system-on-chip","display_name":"system-on-chip","score":0.6420000195503235},{"id":"https://openalex.org/keywords/analog-circuit-synthesis","display_name":"analog circuit synthesis","score":0.5109999775886536}],"concepts":[{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.8898923397064209},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7688888311386108},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.601288378238678},{"id":"https://openalex.org/C159149176","wikidata":"https://www.wikidata.org/wiki/Q14489129","display_name":"Evolutionary algorithm","level":2,"score":0.5256460905075073},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.510567307472229},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5091866850852966},{"id":"https://openalex.org/C105902424","wikidata":"https://www.wikidata.org/wiki/Q1197129","display_name":"Evolutionary computation","level":2,"score":0.48902902007102966},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.4822200536727905},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47389355301856995},{"id":"https://openalex.org/C102248274","wikidata":"https://www.wikidata.org/wiki/Q168388","display_name":"Adaptive filter","level":2,"score":0.45537954568862915},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3451945185661316},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.26137641072273254},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25860291719436646},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2509414553642273},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1618330180644989},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.1587740182876587},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.1508224904537201},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.11050406098365784},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1102583110332489},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tsp.2012.6256316","doi":"https://doi.org/10.1109/tsp.2012.6256316","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsp.2012.6256316","pdf_url":null,"source":{"id":"https://openalex.org/S7407087289","display_name":"International Conference on Telecommunications and Signal Processing (TSP)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 35th International Conference on Telecommunications and Signal Processing (TSP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1515533753","https://openalex.org/W1524759419","https://openalex.org/W1577050649","https://openalex.org/W1667799381","https://openalex.org/W1694303068","https://openalex.org/W1764193813","https://openalex.org/W2020169927","https://openalex.org/W2077597155","https://openalex.org/W2082181569","https://openalex.org/W2108732866","https://openalex.org/W2150683841","https://openalex.org/W2162244001","https://openalex.org/W2162317400","https://openalex.org/W2162990051","https://openalex.org/W6630834067"],"related_works":["https://openalex.org/W2076704792","https://openalex.org/W2151703116","https://openalex.org/W2164800245","https://openalex.org/W2110008533","https://openalex.org/W2587153312","https://openalex.org/W749694899","https://openalex.org/W2138371171","https://openalex.org/W2075222233","https://openalex.org/W2129978467","https://openalex.org/W1837814652"],"abstract_inverted_index":{"Latest":[0],"trends":[1],"in":[2,117],"communication":[3],"and":[4,64,86,110,138],"consumer":[5],"electronics":[6],"target":[7],"the":[8,32,58,61,66,112,127,132,135,139],"development":[9],"of":[10,31,60,65,93,134],"fully":[11],"adaptive":[12,25,129],"systems":[13],"on":[14,126],"mixed":[15],"signal":[16],"systems-on-chip.":[17],"This":[18],"paper":[19],"proposes":[20],"an":[21],"evolutionary":[22,33,83],"approach":[23],"to":[24,114],"filter":[26,68,99],"design.":[27],"The":[28,43,51,98],"hardware":[29],"support":[30],"design":[34,79],"algorithm":[35,53,101],"is":[36,72,80,89,102],"a":[37,75,94],"field":[38],"programmable":[39],"analog":[40],"array":[41],"(FPAA).":[42],"FPAA":[44,63],"has":[45,54,111],"been":[46,55],"implemented":[47],"with":[48,74,82],"OTA-C":[49],"techniques.":[50],"synthesis":[52],"developed":[56],"considering":[57],"particularities":[59],"proposed":[62,136],"supported":[67],"structures.":[69],"Topological":[70],"reconfiguration":[71],"performed":[73,81,125],"lookup":[76],"table,":[77],"parametric":[78],"computation":[84],"methods":[85],"wide-band":[87],"self-calibration":[88],"achieved":[90],"by":[91],"means":[92],"phase":[95],"locked":[96],"loop.":[97],"sizing":[100],"suitable":[103],"for":[104],"both":[105],"intrinsic":[106],"or":[107],"extrinsic":[108],"evolution":[109],"potential":[113],"be":[115],"hard-wired":[116],"dedicated":[118],"digital":[119],"circuitry.":[120,141],"Extensive":[121],"transistor":[122],"level":[123],"simulations":[124],"evolved":[128],"filters":[130],"prove":[131],"functionality":[133],"software":[137],"underlying":[140]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2}],"updated_date":"2026-11-14T11:04:58.165337","created_date":"2016-06-24T00:00:00"}