{"id":"https://openalex.org/W2012471639","doi":"https://doi.org/10.1109/tcad.2010.2088950","title":"Automatic Pipelining From Transactional Datapath Specifications","display_name":"Automatic Pipelining From Transactional Datapath Specifications","publication_year":2011,"publication_date":"2011-02-18","ids":{"openalex":"https://openalex.org/W2012471639","doi":"https://doi.org/10.1109/tcad.2010.2088950","mag":"2012471639"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2088950","doi":"https://doi.org/10.1109/tcad.2010.2088950","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2088950","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084078152","display_name":"Eriko Nurvitadhi","orcid":"https://orcid.org/0000-0002-2347-9590","observed_orcids":["https://orcid.org/0000-0002-2347-9590"]},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eriko Nurvitadhi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, , USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":null,"display_name":"James C. Hoe","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James C. Hoe","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, , USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019748531","display_name":"Timothy Kam","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Timothy Kam","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113824454","display_name":"Shih\u2010Lien Lu","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shih-Lien L. Lu","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":1.6615,"has_fulltext":false,"cited_by_count":30,"citation_normalized_percentile":{"value":0.87074621,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":98},"biblio":{"volume":"30","issue":"3","first_page":"441","last_page":"454"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9731000065803528,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9731000065803528,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.017999999225139618,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.002899999963119626,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/data-path-synthesis","display_name":"data path synthesis","score":0.8370000123977661},{"id":"https://openalex.org/keywords/pipeline-stalls","display_name":"pipeline stalls","score":0.5920000076293945},{"id":"https://openalex.org/keywords/data-forwarding","display_name":"data forwarding","score":0.7360000014305115},{"id":"https://openalex.org/keywords/speculative-execution","display_name":"speculative execution","score":0.9580000042915344},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"reduced instruction set computing","score":0.8360000252723694},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"design space exploration","score":0.7870000004768372}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9030623435974121},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8572679758071899},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6434450149536133},{"id":"https://openalex.org/C2778565505","wikidata":"https://www.wikidata.org/wiki/Q2207566","display_name":"Spec#","level":2,"score":0.5835429430007935},{"id":"https://openalex.org/C141331961","wikidata":"https://www.wikidata.org/wiki/Q2164465","display_name":"Speculative execution","level":2,"score":0.5640159249305725},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5185844898223877},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.5028547644615173},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4937213361263275},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.4272921681404114},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34314095973968506}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2010.2088950","doi":"https://doi.org/10.1109/tcad.2010.2088950","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2088950","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-a","cwts-core","dongbi-a","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.852.1298","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.852.1298","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://users.ece.cmu.edu/%7Ejhoe/distribution/2010/date10.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5378999710083008}],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320307102","display_name":"Intel Corporation","ror":"https://ror.org/01ek73717"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1555915743","https://openalex.org/W1577039630","https://openalex.org/W1603717301","https://openalex.org/W1612189975","https://openalex.org/W1686420892","https://openalex.org/W1823084595","https://openalex.org/W2014714034","https://openalex.org/W2025694687","https://openalex.org/W2054198444","https://openalex.org/W2104869032","https://openalex.org/W2112537029","https://openalex.org/W2115541788","https://openalex.org/W2120635877","https://openalex.org/W2120665166","https://openalex.org/W2123269102","https://openalex.org/W2123905682","https://openalex.org/W2133088975","https://openalex.org/W2145843790","https://openalex.org/W2157855196","https://openalex.org/W2157904683","https://openalex.org/W2161038820","https://openalex.org/W2171697422","https://openalex.org/W3147194359","https://openalex.org/W4234669735","https://openalex.org/W4244878519","https://openalex.org/W4246325605","https://openalex.org/W4249778561","https://openalex.org/W4250844580","https://openalex.org/W6636251665"],"related_works":["https://openalex.org/W2043735637","https://openalex.org/W7100440042","https://openalex.org/W2161094114","https://openalex.org/W2123905682","https://openalex.org/W7098154960","https://openalex.org/W1756465043","https://openalex.org/W2227266849","https://openalex.org/W4413121942","https://openalex.org/W2100596926","https://openalex.org/W4404133849"],"abstract_inverted_index":{"This":[0,145],"paper":[1,146],"presents":[2],"a":[3,10,31,38,72,90,176,197],"transactional":[4],"specification":[5],"framework":[6],"(T-spec)":[7],"for":[8],"describing":[9],"datapath":[11,32,91],"and":[12,86,130,153,160,191],"the":[13,41,47,75,83,104,111,118,121,132,140,169,173],"tool":[14],"T-piper":[15,95,107,154],"to":[16,93,96,116,126,136,155],"synthesize":[17],"automatically":[18,109],"an":[19],"in-order":[20],"pipelined":[21,122],"implementation":[22],"with":[23],"arbitrary":[24],"user-specified":[25],"pipeline-stage":[26],"boundaries.":[27],"T-spec":[28,81,152],"abstractly":[29],"views":[30],"as":[33],"executing":[34],"one":[35],"transaction":[36],"at":[37],"time,":[39],"computing":[40,159,164],"next":[42],"system":[43],"states":[44],"based":[45],"on":[46],"current":[48],"ones.":[49],"The":[50],"synthesized":[51],"pipeline":[52,66,112,137,166,188],"maintains":[53],"this":[54],"semantics,":[55],"yet":[56],"allows":[57],"concurrent":[58],"execution":[59],"of":[60,74,78,120,142,181],"multiple":[61],"overlapped":[62,105],"transactions":[63],"in":[64,89,139,187],"different":[65],"stages,":[67],"where":[68],"each":[69,79],"stage":[70],"performs":[71],"part":[73],"next-state":[76],"computation":[77],"transaction.":[80],"makes":[82],"state":[84],"reading":[85],"writing":[87],"events":[88],"explicit":[92],"enable":[94],"perform":[97],"exact":[98],"read-after-write":[99],"(RAW)":[100],"hazard":[101],"analysis":[102],"between":[103],"transactions.":[106],"can":[108],"generate":[110],"control":[113],"not":[114],"only":[115],"ensure":[117],"correctness":[119],"executions":[123],"but":[124],"also":[125],"minimize":[127],"(using":[128],"forwarding":[129],"speculation)":[131],"performance":[133],"loss":[134],"due":[135],"stalls":[138],"presence":[141],"RAW":[143],"dependencies.":[144],"reports":[147],"design":[148,178],"case":[149],"studies":[150],"applying":[151],"reduced":[156],"instruction":[157,162],"set":[158,163],"complex":[161],"processor":[165],"development.":[167],"In":[168],"latter,":[170],"we":[171],"report":[172],"results":[174],"from":[175,196],"rapid":[177],"space":[179],"exploration":[180],"60":[182],"generated":[183],"x86-subset":[184],"pipelines,":[185],"varying":[186],"depth,":[189],"forwarding,":[190],"speculative":[192],"execution,":[193],"all":[194],"starting":[195],"single":[198],"T-spec.":[199]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}
