{"id":"https://openalex.org/W2005488480","doi":"https://doi.org/10.1145/2345396.2345496","title":"FPGA based sliding window architecture for RC5 encryption","display_name":"FPGA based sliding window architecture for RC5 encryption","publication_year":2012,"publication_date":"2012-08-03","ids":{"openalex":"https://openalex.org/W2005488480","doi":"https://doi.org/10.1145/2345396.2345496","mag":"2005488480"},"language":"en","primary_location":{"id":"doi:10.1145/2345396.2345496","doi":"https://doi.org/10.1145/2345396.2345496","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2345396.2345496","pdf_url":null,"source":{"id":"https://openalex.org/S7407087405","display_name":"International Conference on Advances in Computing, Communications and Informatics (ICACCI)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Advances in Computing, Communications and Informatics","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042534553","display_name":"A. Ruhan Bevi","orcid":"https://orcid.org/0000-0001-7169-4714","observed_orcids":["https://orcid.org/0000-0001-7169-4714"]},"institutions":[{"id":"https://openalex.org/I145286018","display_name":"SRM Institute of Science and Technology","ror":"https://ror.org/050113w36","country_code":"IN","type":"education","lineage":["https://openalex.org/I145286018"]},{"id":"https://openalex.org/I4210131147","display_name":"SRM University","ror":"https://ror.org/037skf023","country_code":"IN","type":"education","lineage":["https://openalex.org/I145286018","https://openalex.org/I4210131147"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"A. Ruhan Bevi","raw_affiliation_strings":["SRM University, Chennai, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SRM University, Chennai, India","institution_ids":["https://openalex.org/I145286018","https://openalex.org/I4210131147"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047774549","display_name":"S. S. V. Sheshu","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I145286018","display_name":"SRM Institute of Science and Technology","ror":"https://ror.org/050113w36","country_code":"IN","type":"education","lineage":["https://openalex.org/I145286018"]},{"id":"https://openalex.org/I4210131147","display_name":"SRM University","ror":"https://ror.org/037skf023","country_code":"IN","type":"education","lineage":["https://openalex.org/I145286018","https://openalex.org/I4210131147"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"S. S. V. Sheshu","raw_affiliation_strings":["SRM University, Chennai, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SRM University, Chennai, India","institution_ids":["https://openalex.org/I145286018","https://openalex.org/I4210131147"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085534994","display_name":"S. Malarvizhi","orcid":"https://orcid.org/0000-0002-0794-3170","observed_orcids":["https://orcid.org/0000-0002-0794-3170"]},"institutions":[{"id":"https://openalex.org/I145286018","display_name":"SRM Institute of Science and Technology","ror":"https://ror.org/050113w36","country_code":"IN","type":"education","lineage":["https://openalex.org/I145286018"]},{"id":"https://openalex.org/I4210131147","display_name":"SRM University","ror":"https://ror.org/037skf023","country_code":"IN","type":"education","lineage":["https://openalex.org/I145286018","https://openalex.org/I4210131147"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"S. Malarvizhi","raw_affiliation_strings":["SRM University, Chennai, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SRM University, Chennai, India","institution_ids":["https://openalex.org/I145286018","https://openalex.org/I4210131147"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4907,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.58136873,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"614","last_page":"618"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.0020000000949949026,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.0012000000569969416,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fpga-implementation","display_name":"FPGA implementation","score":0.7929999828338623},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"hardware architecture","score":0.6060000061988831},{"id":"https://openalex.org/keywords/reconfigurable-processors","display_name":"reconfigurable processors","score":0.7540000081062317},{"id":"https://openalex.org/keywords/cryptographic-hardware","display_name":"cryptographic hardware","score":0.8100000023841858},{"id":"https://openalex.org/keywords/encryption-latency","display_name":"encryption latency","score":0.5339999794960022},{"id":"https://openalex.org/keywords/area-delay-tradeoff","display_name":"area-delay tradeoff","score":0.6990000009536743},{"id":"https://openalex.org/keywords/xilinx-fpga","display_name":"Xilinx FPGA","score":0.8579999804496765}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7919248342514038},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7899988889694214},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.7464507818222046},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.7247854471206665},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5833567976951599},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.4572754204273224},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.45013442635536194},{"id":"https://openalex.org/C15927051","wikidata":"https://www.wikidata.org/wiki/Q246593","display_name":"Cryptographic primitive","level":4,"score":0.41981613636016846},{"id":"https://openalex.org/C33884865","wikidata":"https://www.wikidata.org/wiki/Q1254335","display_name":"Cryptographic protocol","level":3,"score":0.36598628759384155},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3465069532394409},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17635592818260193},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.16521474719047546},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2345396.2345496","doi":"https://doi.org/10.1145/2345396.2345496","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2345396.2345496","pdf_url":null,"source":{"id":"https://openalex.org/S7407087405","display_name":"International Conference on Advances in Computing, Communications and Informatics (ICACCI)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Advances in Computing, Communications and Informatics","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W110661241","https://openalex.org/W568196246","https://openalex.org/W1500356409","https://openalex.org/W2029876411","https://openalex.org/W2053152522","https://openalex.org/W2105114284","https://openalex.org/W2114097755","https://openalex.org/W2137129070","https://openalex.org/W2152481965","https://openalex.org/W2163109311","https://openalex.org/W2165426942","https://openalex.org/W2484160478","https://openalex.org/W2537481404"],"related_works":["https://openalex.org/W1971035473","https://openalex.org/W2136502376","https://openalex.org/W2361741398","https://openalex.org/W2799182661","https://openalex.org/W7099847276","https://openalex.org/W2142088976","https://openalex.org/W51946296","https://openalex.org/W2106142373","https://openalex.org/W4283450955","https://openalex.org/W2735954599"],"abstract_inverted_index":{"In":[0],"the":[1,6,45,73,87],"current":[2],"scenario,":[3],"security":[4,24],"for":[5,28,40,66],"data":[7],"has":[8,43],"more":[9],"of":[10,23,35,49,89,97],"its":[11],"concern.":[12],"Many":[13],"encryption":[14,84],"algorithms":[15],"have":[16],"been":[17],"proposed":[18],"to":[19,71,81],"satisfy":[20,72],"certain":[21],"levels":[22],"issues":[25],"and":[26,47,75,104],"known":[27],"their":[29],"cryptographic":[30,41,68],"strengths.":[31],"The":[32,92],"extensive":[33],"use":[34],"reconfigurable":[36],"processors":[37],"like":[38],"FPGA":[39,65],"applications":[42],"made":[44],"design":[46],"testing":[48],"hardware":[50,61],"logic":[51],"simple.":[52],"This":[53,78],"paper":[54],"introduces,":[55],"a":[56],"new":[57],"sliding":[58],"window":[59],"based":[60,101],"architecture":[62],"in":[63],"Xilinx":[64],"RC5":[67,99],"algorithm":[69],"modeled":[70],"response":[74],"waiting":[76],"time.":[77],"is":[79],"done":[80],"provide":[82],"faster":[83],"thereby":[85],"reducing":[86],"risk":[88],"deadline":[90],"miss.":[91],"performance":[93],"comparison":[94],"between":[95],"implementation":[96],"various":[98],"architectures":[100],"on":[102],"area":[103],"delay":[105],"are":[106],"graphed.":[107]},"counts_by_year":[{"year":2019,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-10-30T12:39:25.321706","created_date":"2016-06-24T00:00:00"}