{"id":"https://openalex.org/W1967933985","doi":"https://doi.org/10.1587/transfun.e97.a.777","title":"A Flash TDC with 2.6-4.2ps Resolution Using a Group of UnbalancedCMOS Arbiters","display_name":"A Flash TDC with 2.6-4.2ps Resolution Using a Group of UnbalancedCMOS Arbiters","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W1967933985","doi":"https://doi.org/10.1587/transfun.e97.a.777","mag":"1967933985"},"language":"en","primary_location":{"id":"doi:10.1587/transfun.e97.a.777","doi":"https://doi.org/10.1587/transfun.e97.a.777","is_oa":false,"landing_page_url":"https://doi.org/10.1587/transfun.e97.a.777","pdf_url":null,"source":{"id":"https://openalex.org/S166990724","display_name":"IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences","issn_l":"0916-8508","issn":["0916-8508","1745-1337"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","dongbi-c","jufo-1","norway-1","poland-20","russia-white-list-4"],"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences","raw_type":"journal-article"},"volume":null,"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Satoshi KOMATSU","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Satoshi KOMATSU","raw_affiliation_strings":["VLSI Design and Education Center (VDEC), The University of Tokyo"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), The University of Tokyo","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010763159","display_name":"Takahiro J. YAMAGUCHI","orcid":"https://orcid.org/0000-0003-0325-8878","observed_orcids":["https://orcid.org/0000-0003-0325-8878"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Takahiro J. YAMAGUCHI","raw_affiliation_strings":["ADVANTEST Laboratories Ltd"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ADVANTEST Laboratories Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100645455","display_name":"Mohamed Abd Elhamid Abbas","orcid":"https://orcid.org/0000-0002-3141-2900","observed_orcids":["https://orcid.org/0000-0002-3141-2900","https://orcid.org/0000-0002-4115-8264"]},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Mohamed ABBAS","raw_affiliation_strings":["VLSI Design and Education Center (VDEC), The University of Tokyo"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), The University of Tokyo","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110232130","display_name":"Nguyen Ngoc Mai Khanh","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Nguyen Ngoc MAI KHANH","raw_affiliation_strings":["VLSI Design and Education Center (VDEC), The University of Tokyo"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), The University of Tokyo","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081084989","display_name":"James S. Tandon","orcid":"https://orcid.org/0000-0001-9087-0197","observed_orcids":["https://orcid.org/0000-0001-9087-0197"]},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"James TANDON","raw_affiliation_strings":["VLSI Design and Education Center (VDEC), The University of Tokyo"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), The University of Tokyo","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028680447","display_name":"Kunihiro Asada","orcid":"https://orcid.org/0000-0002-1150-0241","observed_orcids":["https://orcid.org/0000-0002-1150-0241"]},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kunihiro ASADA","raw_affiliation_strings":["VLSI Design and Education Center (VDEC), The University of Tokyo"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), The University of Tokyo","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3542,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.66221736,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"E97.A","issue":"3","first_page":"777","last_page":"780"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9150000214576721,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9150000214576721,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.07840000092983246,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.0038999998942017555,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/timing-offset","display_name":"timing offset","score":0.42500001192092896},{"id":"https://openalex.org/keywords/temporal-resolution","display_name":"temporal resolution","score":0.5249999761581421},{"id":"https://openalex.org/keywords/standard-cell-library","display_name":"standard cell library","score":0.8050000071525574}],"concepts":[{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.8783985376358032},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6604155898094177},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.6566494703292847},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6553405523300171},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.510169506072998},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4681228697299957},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.4310159981250763},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4272363781929016},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.4170060157775879},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38767266273498535},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3412122130393982},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2856740951538086},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1913667917251587},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18871191143989563},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06971621513366699},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/transfun.e97.a.777","doi":"https://doi.org/10.1587/transfun.e97.a.777","is_oa":false,"landing_page_url":"https://doi.org/10.1587/transfun.e97.a.777","pdf_url":null,"source":{"id":"https://openalex.org/S166990724","display_name":"IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences","issn_l":"0916-8508","issn":["0916-8508","1745-1337"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","dongbi-c","jufo-1","norway-1","poland-20","russia-white-list-4"],"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1989913218","https://openalex.org/W2027706388","https://openalex.org/W2074853895","https://openalex.org/W2117966934","https://openalex.org/W2122185582","https://openalex.org/W2151807985","https://openalex.org/W2154658572"],"related_works":["https://openalex.org/W1989913218","https://openalex.org/W1579490680","https://openalex.org/W2117966934","https://openalex.org/W2057607794","https://openalex.org/W7222839719","https://openalex.org/W2027706388","https://openalex.org/W1858411388","https://openalex.org/W7098986657","https://openalex.org/W1545457071","https://openalex.org/W2122936415"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,81,97,101],"new":[4,56],"flash":[5,74],"time-to-digital":[6],"converter":[7],"(TDC)":[8],"circuit":[9,104],"which":[10,58,88],"exploits":[11],"unbalanced":[12,24],"arbiters":[13,25,87],"to":[14,53,93],"integrate":[15],"intrinsic":[16],"delay":[17],"offsets":[18],"into":[19],"the":[20,34,37,41,55,66,72,86,91],"decision":[21],"elements.":[22],"The":[23],"are":[26,51],"implemented":[27],"with":[28],"cross-coupled":[29],"standard":[30,82],"NAND":[31,38,78],"cells":[32,39,79],"and":[33,49],"combination":[35],"of":[36,68],"decides":[40],"timing":[42],"offset":[43],"between":[44],"two":[45],"input":[46,69],"signals.":[47,70],"Simulations":[48],"measurements":[50],"conducted":[52],"validate":[54],"circuit,":[57],"provides":[59],"variable":[60],"time":[61],"difference":[62],"ranges":[63],"by":[64],"controlling":[65],"slope":[67],"Since":[71],"proposed":[73],"TDC":[75,92],"uses":[76],"only":[77],"in":[80,100],"cell":[83],"library":[84],"for":[85],"easily":[89],"enables":[90],"be":[94],"used":[95],"as":[96],"soft":[98],"macro":[99],"typical":[102],"digital":[103],"design":[105],"flow.":[106]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-09-29T14:09:16.559479","created_date":"2016-06-24T00:00:00"}
