{"id":"https://openalex.org/W163466248","doi":null,"title":"Aceleraci\u00f3n de procesamiento intensivo mediante plataformas de hardware reconfigurable","display_name":"Aceleraci\u00f3n de procesamiento intensivo mediante plataformas de hardware reconfigurable","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W163466248","mag":"163466248"},"language":"es","primary_location":{"id":"pmh:oai:www.ucm.es:9152","doi":null,"is_oa":true,"landing_page_url":"http://eprints.ucm.es/9152/1/Memoria.pdf","pdf_url":"http://eprints.ucm.es/9152/1/Memoria.pdf","source":{"id":"https://openalex.org/S4306400298","display_name":"Library Open Repository (Universidad Complutense Madrid)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I121748325","host_organization_name":"Universidad Complutense de Madrid","host_organization_lineage":["https://openalex.org/I121748325"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"","raw_type":"PeerReviewed"},"volume":null,"type":"article","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://eprints.ucm.es/9152/1/Memoria.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031105264","display_name":"Emilio Mart\u00ednez Pacheco","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Emilio Mart\u00ednez Pacheco","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003038215","display_name":"Federico Yeray Navarro Polo","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Federico Yeray Navarro Polo","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5035801338","display_name":"Antonio Gonz\u00e1lez S\u00e1nchez-Migall\u00f3n","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Antonio Gonz\u00e1lez S\u00e1nchez-Migall\u00f3n","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9843999743461609,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9843999743461609,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.013100000098347664,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.002099999925121665,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fpga","display_name":"FPGA","score":0.8640000224113464},{"id":"https://openalex.org/keywords/reconfigurable-hardware","display_name":"reconfigurable hardware","score":0.7839999794960022},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"hardware acceleration","score":0.9010000228881836},{"id":"https://openalex.org/keywords/pci-bus-interface","display_name":"PCI bus interface","score":0.7990000247955322},{"id":"https://openalex.org/keywords/aes-encryption","display_name":"AES encryption","score":0.6019999980926514},{"id":"https://openalex.org/keywords/neural-network-acceleration","display_name":"neural network acceleration","score":0.7210000157356262}],"concepts":[{"id":"https://openalex.org/C15708023","wikidata":"https://www.wikidata.org/wiki/Q80083","display_name":"Humanities","level":1,"score":0.8192881345748901},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5985124707221985},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.27389782667160034}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:oai:www.ucm.es:9152","doi":null,"is_oa":true,"landing_page_url":"http://eprints.ucm.es/9152/1/Memoria.pdf","pdf_url":"http://eprints.ucm.es/9152/1/Memoria.pdf","source":{"id":"https://openalex.org/S4306400298","display_name":"Library Open Repository (Universidad Complutense Madrid)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I121748325","host_organization_name":"Universidad Complutense de Madrid","host_organization_lineage":["https://openalex.org/I121748325"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"","raw_type":"PeerReviewed"},{"id":"mag:163466248","doi":null,"is_oa":false,"landing_page_url":"http://eprints.ucm.es/9152/1/Memoria.pdf","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null}],"best_oa_location":{"id":"pmh:oai:www.ucm.es:9152","doi":null,"is_oa":true,"landing_page_url":"http://eprints.ucm.es/9152/1/Memoria.pdf","pdf_url":"http://eprints.ucm.es/9152/1/Memoria.pdf","source":{"id":"https://openalex.org/S4306400298","display_name":"Library Open Repository (Universidad Complutense Madrid)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I121748325","host_organization_name":"Universidad Complutense de Madrid","host_organization_lineage":["https://openalex.org/I121748325"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"","raw_type":"PeerReviewed"},"sustainable_development_goals":[{"score":0.6773999929428101,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1587120902","https://openalex.org/W2117013296","https://openalex.org/W2135430020","https://openalex.org/W2164375469"],"related_works":["https://openalex.org/W6998258972","https://openalex.org/W1679123747","https://openalex.org/W2759155801","https://openalex.org/W2970849591","https://openalex.org/W2542986567","https://openalex.org/W1714418047","https://openalex.org/W2729143682","https://openalex.org/W7133374422","https://openalex.org/W7095630941","https://openalex.org/W2580284127"],"abstract_inverted_index":{"El":[0,209],"objetivo":[1],"del":[2,22,48,73,168,197,199,231,241,247,254],"proyecto":[3,169,232],"es":[4,77],"conseguir":[5,81],"aprovechar":[6],"la":[7,44,53,70,78,166,195,238,245],"gran":[8],"potencia":[9],"y":[10,43,190],"versatilidad":[11],"que":[12,27,51,109,134,217,235],"ofrece":[13],"el":[14,40,114,141,159,187,191,204,250],"hardware":[15,74,280,461],"reconfigurable":[16,75,279,335],"(FPGA)":[17,281],"para":[18,107,193],"liberar":[19],"al":[20,234],"procesador":[21],"PC":[23,42,285,310],"de":[24,55,62,69,86,89,92,119,124,130,150,161,206,221,224],"c\u00e1lculos":[25,120],"intensivos":[26],"demande":[28],"una":[29,37,59,82,97,173],"determinada":[30,83],"aplicaci\u00f3n.":[31],"Para":[32],"ello":[33],"se":[34,138,170,179],"ha":[35,139,171,180,236,243],"creado":[36],"interfaz":[38],"entre":[39,186],"host":[41,248,309,496],"FPGA":[45,174,318,428],"a":[46,252,320,348,352,403,409,427,436,441],"trav\u00e9s":[47,253],"bus":[49,188],"PCI":[50,189,256,306,450,454,502],"permita":[52],"utilizaci\u00f3n":[54],"\u00e9sta":[56,178],"\u00faltima":[57],"como":[58,76,94,155],"tarjeta":[60],"aceleradora":[61],"prop\u00f3sito":[63],"general.":[64],"\\nEl":[65,228],"sistema,":[66],"haciendo":[67],"uso":[68],"principal":[71],"caracter\u00edstica":[72],"flexibilidad,":[79],"intentar\u00e1":[80],"aceleraci\u00f3n,":[84],"siempre":[85],"forma":[87],"individual,":[88],"distintos":[90,215],"perfiles":[91,223],"ejecuci\u00f3n,":[93],"por":[95,152,158,214],"ejemplo":[96,129],"red":[98],"neuronal":[99],"o":[100],"un":[101,131,148,156,182],"algoritmo":[102,142],"espec\u00edfico.":[103],"Idealmente":[104],"est\u00e1":[105],"pensado":[106],"tareas":[108],"necesiten":[110],"m\u00ednima":[111],"comunicaci\u00f3n":[112,246],"con":[113,122,249],"exterior,":[115],"esto":[116],"es,":[117],"algoritmos":[118],"pesados":[121],"transacciones":[123],"entrada/salida":[125],"muy":[126],"sencillas.":[127],"Como":[128],"perfil":[132],"determinado":[133],"cumpla":[135],"estos":[136],"requerimientos":[137],"elegido":[140],"criptogr\u00e1fico":[143],"AES":[144],"(Advanced":[145],"Encryption":[146],"Standard),":[147],"esquema":[149],"cifrado":[151],"bloques":[153],"adoptado":[154],"est\u00e1ndar":[157],"gobierno":[160],"los":[162,222],"Estados":[163],"Unidos.":[164],"\\nPara":[165],"realizaci\u00f3n":[167],"utilizado":[172],"\u201cSpartan":[175],"IIE\u201d.":[176],"En":[177],"introducido":[181],"puente":[183],"(Bridge":[184],"PCI-Wishbone)":[185],"sistema":[192,210],"facilitar":[194],"gesti\u00f3n":[196],"protocolo":[198],"primero,":[200],"siendo":[201],"m\u00e1s":[202],"sencillo":[203],"manejo":[205],"sus":[207],"se\u00f1ales.":[208],"completo":[211],"estar\u00e1":[212],"formado":[213],"m\u00f3dulos":[216],"ejecuten":[218],"cada":[219],"uno":[220],"ejecuci\u00f3n":[225],"anteriormente":[226],"citados.":[227],"elemento":[229],"central":[230],"entorno":[233],"girado":[237],"mayor":[239],"implementaci\u00f3n":[240],"mismo":[242],"sido":[244],"dispositivo":[251],"conector":[255],"existente":[257],"en":[258],"este":[259],"\u00faltimo.":[260],"\\n[ABSTRACT]":[261],"\\nThe":[262,325,472],"main":[263],"target":[264],"of":[265,272,278,290,316,329,334,381,414,420,476,485],"the":[266,273,284,288,314,317,330,366,399,412,418,421,445,449,453,456,466,477,482,486,492,495,498,501],"project":[267,422],"is":[268,357,398,491],"to":[269,370,374,439],"get":[270],"benefit":[271],"great":[274],"strength":[275],"and":[276,293,311,388,448,479,497],"versatility":[277],"for":[282,338],"freeing":[283],"multiprocessor":[286],"from":[287],"task":[289],"making":[291],"complex":[292],"intensive":[294],"calculus.":[295],"To":[296],"achieve":[297],"this,":[298],"it":[299,423],"has":[300,424,432,488],"been":[301,425,433,489],"created":[302],"an":[303],"interface":[304],"through":[305,500],"port":[307],"between":[308,365,444,494],"FPGA,":[312],"allowing":[313],"use":[315],"like":[319,345,377,408],"general":[321],"purpose":[322],"acceleration":[323,340],"card.":[324],"system":[326,356,447,457],"takes":[327],"advantage":[328],"most":[331,473,483],"determinant":[332],"feature":[333],"hardware,":[336],"flexibility,":[337],"achieving":[339],"in":[341,359,368,480],"different":[342,460],"execution":[343,468],"profiles,":[344],"could":[346,383,394],"be":[347],"neural":[349],"network":[350],"or":[351],"specific":[353],"algorithm.":[354],"The":[355],"focused":[358],"tasks":[360],"which":[361,393,463,481],"require":[362],"minimal":[363],"communication":[364,443,493],"nodes,":[367],"order":[369],"avoid":[371],"non":[372],"relative":[373],"calculus":[375],"tasks,":[376],"data":[378],"load.":[379],"Examples":[380],"this":[382,396],"algorithms":[384],"with":[385,435,459],"heavy":[386],"operations":[387],"simple":[389],"I/O.":[390],"A":[391],"profile":[392],"satisfy":[395],"requisite":[397],"cryptographic":[400],"algorithm":[401],"AES,":[402],"block":[404],"cipher":[405],"scheme":[406],"adopted":[407],"standard":[410],"by":[411],"government":[413],"United":[415],"States.":[416],"\\nFor":[417],"development":[419],"used":[426],"Spartan":[429],"IIE.":[430],"It":[431],"programmed":[434],"bridge":[437],"PCI-Wishbone":[438],"allow":[440],"simplified":[442],"implemented":[446],"port.":[451,503],"Besides":[452],"Bridge,":[455],"counts":[458],"modules":[462],"carry":[464],"out":[465],"distinct":[467],"profiles":[469],"already":[470],"mentioned.":[471],"relevant":[474],"aspect":[475],"project,":[478],"part":[484],"work":[487],"focused,":[490],"device":[499]},"counts_by_year":[],"updated_date":"2026-11-08T12:12:28.789561","created_date":"2016-06-24T00:00:00"}