{"id":"https://openalex.org/W1623340828","doi":"https://doi.org/10.1109/icassp.1987.1169491","title":"New 2nDCT algorithms suitable for VLSI implementation","display_name":"New 2nDCT algorithms suitable for VLSI implementation","publication_year":2005,"publication_date":"2005-03-24","ids":{"openalex":"https://openalex.org/W1623340828","doi":"https://doi.org/10.1109/icassp.1987.1169491","mag":"1623340828"},"language":"en","primary_location":{"id":"doi:10.1109/icassp.1987.1169491","doi":"https://doi.org/10.1109/icassp.1987.1169491","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1987.1169491","pdf_url":null,"source":{"id":"https://openalex.org/S4363607879","display_name":"IEEE International Conference on Acoustics Speech and Signal Processing","issn_l":"1520-6149","issn":["1520-6149","2379-190X"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-2","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '87. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084930221","display_name":"Pierre Duhamel","orcid":"https://orcid.org/0000-0002-7942-0934","observed_orcids":["https://orcid.org/0000-0002-7942-0934"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"P. Duhamel","raw_affiliation_strings":["PAB/RPE, CNET, Issy-Les-Moulineaux, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"PAB/RPE, CNET, Issy-Les-Moulineaux, France","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016739206","display_name":"H. H'Mida","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"H. H'Mida","raw_affiliation_strings":["PAB/RPE, CNET, Issy-Les-Moulineaux, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"PAB/RPE, CNET, Issy-Les-Moulineaux, France","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.6713,"has_fulltext":false,"cited_by_count":58,"citation_normalized_percentile":{"value":0.9040901,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":88,"max":98},"biblio":{"volume":"12","issue":null,"first_page":"1805","last_page":"1808"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.003599999938160181,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.00039999998989515007,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"discrete cosine transform","score":0.9639999866485596},{"id":"https://openalex.org/keywords/vlsi-implementation","display_name":"VLSI implementation","score":0.8209999799728394},{"id":"https://openalex.org/keywords/image-compression","display_name":"image compression","score":0.7609999775886536},{"id":"https://openalex.org/keywords/video-compression","display_name":"video compression","score":0.5830000042915344},{"id":"https://openalex.org/keywords/modular-arithmetic","display_name":"modular arithmetic","score":0.7289999723434448},{"id":"https://openalex.org/keywords/distributed-arithmetic","display_name":"distributed arithmetic","score":0.828000009059906},{"id":"https://openalex.org/keywords/polynomial-decomposition","display_name":"polynomial decomposition","score":0.6269999742507935},{"id":"https://openalex.org/keywords/cyclic-convolution","display_name":"cyclic convolution","score":0.9150000214576721},{"id":"https://openalex.org/keywords/fft-architecture","display_name":"FFT architecture","score":0.5450000166893005},{"id":"https://openalex.org/keywords/multiplier-reduction","display_name":"multiplier reduction","score":0.45399999618530273},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"hardware architecture","score":0.3630000054836273}],"concepts":[{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.8592890501022339},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7196444272994995},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.6379802227020264},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5265510678291321},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5219773054122925},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.4937003552913666},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.470805287361145},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.4566251039505005},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.44402745366096497},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4189160466194153},{"id":"https://openalex.org/C5317259","wikidata":"https://www.wikidata.org/wiki/Q4462361","display_name":"Trellis quantization","level":5,"score":0.41689449548721313},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3350200057029724},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.2847692370414734},{"id":"https://openalex.org/C13481523","wikidata":"https://www.wikidata.org/wiki/Q412438","display_name":"Image compression","level":4,"score":0.2843184471130371},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.17705532908439636},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.16837218403816223},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1173279881477356},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08352664113044739},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icassp.1987.1169491","doi":"https://doi.org/10.1109/icassp.1987.1169491","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1987.1169491","pdf_url":null,"source":{"id":"https://openalex.org/S4363607879","display_name":"IEEE International Conference on Acoustics Speech and Signal Processing","issn_l":"1520-6149","issn":["1520-6149","2379-190X"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-2","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '87. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1964786590","https://openalex.org/W1968078911","https://openalex.org/W1980756090","https://openalex.org/W1985896262","https://openalex.org/W2034833016","https://openalex.org/W2083775551","https://openalex.org/W2084466783","https://openalex.org/W2093618940","https://openalex.org/W2099490452","https://openalex.org/W2105815873","https://openalex.org/W2113994308","https://openalex.org/W2158359807","https://openalex.org/W4296980820"],"related_works":["https://openalex.org/W2110895090","https://openalex.org/W2057199224","https://openalex.org/W2112309732","https://openalex.org/W2547275556","https://openalex.org/W2051894640","https://openalex.org/W2225999060","https://openalex.org/W2164910164","https://openalex.org/W2139220309","https://openalex.org/W1488776315","https://openalex.org/W2031447054"],"abstract_inverted_index":{"Small":[0],"length":[1,15],"Discrete":[2],"Cosine":[3],"Transforms":[4],"(DCT's)":[5],"are":[6,20,122],"used":[7,107],"for":[8,108],"image":[9],"data":[10],"compression.":[11],"In":[12],"that":[13,60],"case,":[14],"8":[16],"or":[17],"16":[18],"DCT's":[19,34],"needed":[21,65],"to":[22],"be":[23,106],"performed":[24],"at":[25],"video":[26],"rate.":[27],"We":[28],"propose":[29],"two":[30],"new":[31,120,127],"implementation":[32,44],"of":[33,74,82,116,129,143],"which":[35,136],"have":[36],"several":[37],"interesting":[38],"features,":[39],"as":[40,42,132],"far":[41],"VLSI":[43],"is":[45,64,137],"concerned.":[46],"A":[47,67],"first":[48,141],"one,":[49,69],"using":[50],"modulo-arithmetic,":[51],"needs":[52],"only":[53,113],"one":[54],"multiplication":[55],"per":[56],"input":[57],"point,":[58],"so":[59],"a":[61,72,91,96,126,130,133],"single":[62],"multiplier":[63],"on-chip.":[66],"second":[68],"based":[70,124],"on":[71,125],"decomposition":[73],"the":[75,102,114,117,140,144],"DCT":[76],"into":[77],"polynomial":[78,84],"products,":[79],"and":[80,99],"evaluation":[81],"these":[83],"products":[85],"by":[86,111],"distributed":[87],"arithmetic,":[88],"results":[89],"in":[90,139],"very":[92],"small":[93],"chip,":[94],"with":[95],"great":[97],"regularity":[98],"testability.":[100],"Furthermore,":[101],"same":[103],"structure":[104],"can":[105],"FFT":[109],"computation":[110],"changing":[112],"ROM-part":[115],"chip.":[118],"Both":[119],"architectures":[121],"mainly":[123],"formulation":[128],"length-2nDCT":[131],"cyclic":[134],"convolution,":[135],"explained":[138],"section":[142],"paper.":[145]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":6}],"updated_date":"2026-11-08T12:12:28.789561","created_date":"2016-06-24T00:00:00"}