{"id":"https://openalex.org/W157706557","doi":null,"title":"JBits: Java based interface for reconfigurable computing","display_name":"JBits: Java based interface for reconfigurable computing","publication_year":1999,"publication_date":"1999-01-01","ids":{"openalex":"https://openalex.org/W157706557","mag":"157706557"},"language":"en","primary_location":{"id":"pmh:oai:CiteSeerX.psu:10.1.1.5.5413","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.5.5413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.io.com/~guccione/Papers/MAPPLD/JBitsMAPPLD.pdf","raw_type":"text"},"volume":null,"type":"article","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111458804","display_name":"Steve Guccione","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]},{"id":"https://openalex.org/I4210101362","display_name":"Xilinx (Ireland)","ror":"https://ror.org/00pahkj72","country_code":"IE","type":"company","lineage":["https://openalex.org/I32923980","https://openalex.org/I4210101362"]}],"countries":["IE","US"],"is_corresponding":false,"raw_author_name":"Steve Guccione","raw_affiliation_strings":["Xilinx"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xilinx","institution_ids":["https://openalex.org/I32923980","https://openalex.org/I4210101362"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103479655","display_name":"Delon Levi","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]},{"id":"https://openalex.org/I4210101362","display_name":"Xilinx (Ireland)","ror":"https://ror.org/00pahkj72","country_code":"IE","type":"company","lineage":["https://openalex.org/I32923980","https://openalex.org/I4210101362"]}],"countries":["IE","US"],"is_corresponding":false,"raw_author_name":"Delon Levi","raw_affiliation_strings":["Xilinx"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xilinx","institution_ids":["https://openalex.org/I32923980","https://openalex.org/I4210101362"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000693480","display_name":"Prasanna Sundararajan","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]},{"id":"https://openalex.org/I4210101362","display_name":"Xilinx (Ireland)","ror":"https://ror.org/00pahkj72","country_code":"IE","type":"company","lineage":["https://openalex.org/I32923980","https://openalex.org/I4210101362"]}],"countries":["IE","US"],"is_corresponding":false,"raw_author_name":"Prasanna Sundararajan","raw_affiliation_strings":["Xilinx"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xilinx","institution_ids":["https://openalex.org/I32923980","https://openalex.org/I4210101362"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":12.9329,"has_fulltext":false,"cited_by_count":179,"citation_normalized_percentile":{"value":0.98512537,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":88,"max":99},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9574999809265137,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9574999809265137,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.024700000882148743,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.012900000438094139,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/xilinx-fpga","display_name":"Xilinx FPGA","score":0.828000009059906},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"reconfigurable computing","score":0.7919999957084656},{"id":"https://openalex.org/keywords/java-api","display_name":"Java API","score":0.6970000267028809},{"id":"https://openalex.org/keywords/fpga-configuration","display_name":"FPGA configuration","score":0.48100000619888306},{"id":"https://openalex.org/keywords/lookup-tables","display_name":"look-up table","score":0.7059999704360962},{"id":"https://openalex.org/keywords/flip-flops","display_name":"flip-flops","score":0.8880000114440918},{"id":"https://openalex.org/keywords/hardware-debugging","display_name":"hardware debugging","score":0.8140000104904175}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8208575248718262},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.7193801403045654},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7129698395729065},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5978745222091675},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5770052075386047},{"id":"https://openalex.org/C548217200","wikidata":"https://www.wikidata.org/wiki/Q251","display_name":"Java","level":2,"score":0.5012152194976807},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4675561189651489},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.46384838223457336},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.44722381234169006},{"id":"https://openalex.org/C99613125","wikidata":"https://www.wikidata.org/wiki/Q165194","display_name":"Application programming interface","level":2,"score":0.437473326921463},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4192188084125519},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3987523317337036},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35993123054504395},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2170741856098175},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"pmh:oai:CiteSeerX.psu:10.1.1.5.5413","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.5.5413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.io.com/~guccione/Papers/MAPPLD/JBitsMAPPLD.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.84.3629","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.84.3629","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://deimos.eos.uoguelph.ca/sareibi/TEACHING_dr/ENG6530_RCS_html_dr/outline_W2007/docs/LECTURE_dr/WEEK11_dr/PAPERS_dr/JBits.pdf","raw_type":"text"},{"id":"mag:157706557","doi":null,"is_oa":false,"landing_page_url":"http://users.utcluj.ro/~baruch/resources/JBits/JBitsMAPPLD.pdf","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W146906408","https://openalex.org/W1534132903"],"related_works":["https://openalex.org/W7099789668","https://openalex.org/W2047361732","https://openalex.org/W147833790","https://openalex.org/W7099528597","https://openalex.org/W7095904995","https://openalex.org/W2136725189","https://openalex.org/W2612354329","https://openalex.org/W2135660453","https://openalex.org/W2117955695","https://openalex.org/W2171439655"],"abstract_inverted_index":{"The":[0,24,65,144,193,208],"JBits":[1],"\u2122":[2,9],"software":[3,63],"is":[4,160,191,195,213],"a":[5,91,112,161,173],"set":[6],"of":[7,94,201],"Java":[8,86],"classes":[10],"which":[11],"provide":[12],"an":[13],"Application":[14],"Programming":[15],"Interface":[16],"(API)":[17],"to":[18,58,70,75,102,114,138,151,175,210],"access":[19],"the":[20,53,56,81,85,152,178,182,189,198,202,211,217],"Xilinx":[21,32,153,169,218],"FPGA":[22,57,223],"bitstream.":[23],"interface":[25,209],"operates":[26],"on":[27,36,150],"either":[28],"bitstreams":[29,37],"generated":[30],"by":[31,215],"design":[33,121],"tools,":[34],"or":[35,100],"read":[38],"back":[39],"from":[40],"actual":[41],"hardware.":[42],"This":[43,118],"permits":[44],"all":[45],"configurable":[46],"resources":[47],"like":[48],"Look-up":[49],"tables,":[50],"routing":[51],"and":[52,74,130,155,163,180,185,204],"flip-flops":[54],"in":[55,84],"be":[59,103,109,148],"individually":[60],"configured":[61],"under":[62],"control.":[64],"API":[66,107],"has":[67,89],"been":[68],"used":[69,110],"construct":[71,115],"complete":[72],"circuits":[73,99,145],"modify":[76],"existing":[77],"circuits.":[78],"In":[79],"addition,":[80],"object-oriented":[82],"support":[83],"programming":[87],"language":[88],"permitted":[90],"small":[92],"library":[93],"parameterizable,":[95],"object":[96],"oriented":[97],"macro":[98],"Cores":[101],"implemented.":[104],"Finally,":[105],"this":[106],"may":[108],"as":[111,127,132,134],"base":[113],"other":[116],"tools.":[117],"includes":[119],"traditional":[120],"tools":[122,137],"for":[123,168,222],"performing":[124],"tasks":[125],"such":[126],"circuit":[128,186],"placement":[129],"routing,":[131],"well":[133],"application":[135],"specific":[136],"perform":[139],"more":[140],"narrowly":[141],"defined":[142],"tasks.":[143],"developed":[146],"can":[147],"downloaded":[149],"hardware":[154,165,190,212],"probed":[156],"using":[157,197],"BoardScope.":[158],"BoardScope":[159],"graphical":[162],"interactive":[164],"debug":[166],"tool":[167],"FPGAs.":[170],"It":[171],"enables":[172],"user":[174],"look":[176],"inside":[177],"chips":[179],"see":[181],"internal":[183],"states":[184],"configurations":[187],"while":[188],"operating.":[192],"data":[194],"sampled":[196],"readback":[199],"capabilities":[200],"FPGAs,":[203],"then":[205],"graphically":[206],"displayed.":[207],"provided":[214],"XHWIF,":[216],"standard":[219],"HardWare":[220],"InterFace":[221],"based":[224]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":7},{"year":2012,"cited_by_count":11}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-06-24T00:00:00"}