{"id":"https://openalex.org/W1566416706","doi":"https://doi.org/10.1109/isscc.1995.535583","title":"Clocked-neuron-MOS logic circuits employing auto-threshold-adjustment","display_name":"Clocked-neuron-MOS logic circuits employing auto-threshold-adjustment","publication_year":2002,"publication_date":"2002-11-19","ids":{"openalex":"https://openalex.org/W1566416706","doi":"https://doi.org/10.1109/isscc.1995.535583","mag":"1566416706"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.1995.535583","doi":"https://doi.org/10.1109/isscc.1995.535583","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.1995.535583","pdf_url":null,"source":{"id":"https://openalex.org/S4210210374","display_name":"Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference","issn_l":"0193-6530","issn":["0193-6530","2376-8606"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","norway-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings ISSCC '95 - International Solid-State Circuits Conference","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101569986","display_name":"Koji Kotani","orcid":"https://orcid.org/0000-0003-4395-9978","observed_orcids":["https://orcid.org/0000-0003-4395-9978"]},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Kotani","raw_affiliation_strings":["Department of Electronic Engineering, University of Tohoku, Sendai, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, University of Tohoku, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111934278","display_name":"T. Shibata","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Shibata","raw_affiliation_strings":["Department of Electronic Engineering, University of Tohoku, Sendai, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, University of Tohoku, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111656408","display_name":"Makoto Imai","orcid":"https://orcid.org/0000-0002-9349-7671","observed_orcids":["https://orcid.org/0000-0002-9349-7671"]},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Imai","raw_affiliation_strings":["Department of Electronic Engineering, University of Tohoku, Sendai, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, University of Tohoku, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110826182","display_name":"T. Ohmi","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Ohmi","raw_affiliation_strings":["Department of Electronic Engineering, University of Tohoku, Sendai, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, University of Tohoku, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I201537933"],"apc_list":null,"apc_paid":null,"fwci":9.3862,"has_fulltext":false,"cited_by_count":97,"citation_normalized_percentile":{"value":0.98761276,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":88,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"320","last_page":"321,"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.4207000136375427,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.4207000136375427,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.30469998717308044,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.1793999969959259,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floating-gate","display_name":"floating gate","score":0.7509999871253967}],"concepts":[{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.651394248008728},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5695482492446899},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4956716299057007},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.42884600162506104},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4274982511997223},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4236615300178528},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35765451192855835},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23480361700057983},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19776004552841187},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.18693488836288452},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1329919695854187}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.1995.535583","doi":"https://doi.org/10.1109/isscc.1995.535583","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.1995.535583","pdf_url":null,"source":{"id":"https://openalex.org/S4210210374","display_name":"Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference","issn_l":"0193-6530","issn":["0193-6530","2376-8606"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","norway-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings ISSCC '95 - International Solid-State Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1481312688","https://openalex.org/W1970116248","https://openalex.org/W1987069405","https://openalex.org/W2545117335"],"related_works":["https://openalex.org/W1963699073","https://openalex.org/W2073567346","https://openalex.org/W2111719342","https://openalex.org/W2545311598","https://openalex.org/W1983051814","https://openalex.org/W2975465029","https://openalex.org/W2257332036","https://openalex.org/W1970116248","https://openalex.org/W1998847131","https://openalex.org/W2368566304"],"abstract_inverted_index":{"Using":[0],"a":[1,10,30,40],"multiple-input":[2],"high-functionality":[3],"transistor":[4,43],"neuron":[5],"MOSFET":[6],"(/spl":[7],"nu/MOS),":[8],"demonstrates":[9],"dramatic":[11],"simplification":[12],"of":[13,24,63],"logic":[14,35],"circuit":[15,36],"configuration":[16],"compared":[17],"to":[18,28,45,53,60],"conventional":[19],"CMOS":[20],"circuitry.":[21],"The":[22],"purpose":[23],"this":[25],"paper":[26],"is":[27,49],"present":[29],"new":[31],"clocked":[32],"/spl":[33],"nu/MOS":[34],"scheme":[37],"in":[38],"which":[39],"clock-driven":[41],"switching":[42],"attached":[44],"the":[46,55,69],"floating":[47],"gate":[48],"used":[50],"not":[51],"only":[52],"initialize":[54],"floating-gate":[56],"charge":[57],"but":[58],"also":[59],"perform":[61],"auto-adjusting":[62],"its":[64],"inverting":[65],"threshold":[66],"that":[67],"cancels":[68],"fluctuations":[70],"arising":[71],"from":[72],"fabrication.":[73]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":4}],"updated_date":"2026-10-06T10:28:23.643775","created_date":"2016-06-24T00:00:00"}