{"id":"https://openalex.org/W1533469848","doi":"https://doi.org/10.1109/iccad.1988.122489","title":"A new global router for row-based layout","display_name":"A new global router for row-based layout","publication_year":2003,"publication_date":"2003-01-06","ids":{"openalex":"https://openalex.org/W1533469848","doi":"https://doi.org/10.1109/iccad.1988.122489","mag":"1533469848"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.1988.122489","doi":"https://doi.org/10.1109/iccad.1988.122489","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.1988.122489","pdf_url":null,"source":{"id":"https://openalex.org/S4306419226","display_name":"International Conference on Computer Aided Design","issn_l":"1933-7760","issn":["1933-7760"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043483164","display_name":"K.-W. Lee","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I32971472","display_name":"Yale University","ror":"https://ror.org/03v76x132","country_code":"US","type":"education","lineage":["https://openalex.org/I32971472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K.-W. Lee","raw_affiliation_strings":["Department of Elecmcal Engineering, Yale University, New Heaven, CT, USA","[Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Elecmcal Engineering, Yale University, New Heaven, CT, USA","institution_ids":["https://openalex.org/I32971472"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA]","institution_ids":["https://openalex.org/I32971472"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035758161","display_name":"Carl Sechen","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I32971472","display_name":"Yale University","ror":"https://ror.org/03v76x132","country_code":"US","type":"education","lineage":["https://openalex.org/I32971472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Sechen","raw_affiliation_strings":["Department of Elecmcal Engineering, Yale University, New Heaven, CT, USA","[Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Elecmcal Engineering, Yale University, New Heaven, CT, USA","institution_ids":["https://openalex.org/I32971472"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA]","institution_ids":["https://openalex.org/I32971472"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I32971472"],"apc_list":null,"apc_paid":null,"fwci":4.4851,"has_fulltext":false,"cited_by_count":79,"citation_normalized_percentile":{"value":0.94953686,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"180","last_page":"183"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11661","display_name":"Copper Interconnects and Reliability","score":0.0,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/global-routing","display_name":"global routing","score":0.8989999890327454},{"id":"https://openalex.org/keywords/sea-of-gates","display_name":"sea-of-gates","score":0.7360000014305115},{"id":"https://openalex.org/keywords/gate-arrays","display_name":"gate arrays","score":0.7990000247955322},{"id":"https://openalex.org/keywords/standard-cells","display_name":"standard cells","score":0.7599999904632568},{"id":"https://openalex.org/keywords/track-counts","display_name":"track counts","score":0.6190000176429749},{"id":"https://openalex.org/keywords/macroblock","display_name":"macroblock","score":0.7549999952316284},{"id":"https://openalex.org/keywords/over-the-cell-routing","display_name":"over-the-cell routing","score":0.8690000176429749}],"concepts":[{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.9539353847503662},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7756485939025879},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.7356442213058472},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.6816267967224121},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6543058156967163},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5862695574760437},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5216522812843323},{"id":"https://openalex.org/C2983435990","wikidata":"https://www.wikidata.org/wiki/Q22725","display_name":"Network routing","level":3,"score":0.48098886013031006},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42500314116477966},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.397114098072052},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3315712809562683},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28308895230293274},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2567621171474457},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17198950052261353},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16385814547538757},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07332202792167664},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0607433021068573},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.1988.122489","doi":"https://doi.org/10.1109/iccad.1988.122489","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.1988.122489","pdf_url":null,"source":{"id":"https://openalex.org/S4306419226","display_name":"International Conference on Computer Aided Design","issn_l":"1933-7760","issn":["1933-7760"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.7207000255584717,"display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W42274071","https://openalex.org/W1485193993","https://openalex.org/W1965680834","https://openalex.org/W2017927472","https://openalex.org/W2031904783","https://openalex.org/W2064719503","https://openalex.org/W2116683188","https://openalex.org/W2117082818","https://openalex.org/W2132087752","https://openalex.org/W3148293037"],"related_works":["https://openalex.org/W4244922841","https://openalex.org/W4242973587","https://openalex.org/W109722725","https://openalex.org/W2113227516","https://openalex.org/W2148328189","https://openalex.org/W2098765048","https://openalex.org/W637948283","https://openalex.org/W4235447536","https://openalex.org/W2049846753","https://openalex.org/W2130508803"],"abstract_inverted_index":{"A":[0],"global":[1,52,70],"router":[2,53,73],"for":[3,31],"row-based":[4,32],"layout":[5],"styles":[6],"such":[7],"as":[8],"sea-of-gates,":[9],"gate-array,":[10],"and":[11,28,106],"standard":[12,43],"cell":[13],"circuits":[14,107],"is":[15,18,74,117],"discussed.":[16],"It":[17,85],"part":[19],"of":[20,24,61,66,77,98],"the":[21,37,51,67,82,94],"latest":[22],"version":[23],"TimberWolfSC,":[25],"a":[26],"placement":[27],"routing":[29,116],"package":[30],"layout.":[33],"The":[34,72],"algorithm":[35],"outperformed":[36],"UTMC":[38],"Highland":[39],"system":[40],"on":[41,48,93],"two":[42],"benchmark":[44],"circuits.":[45],"In":[46],"tests":[47],"ten":[49],"circuits,":[50],"produced":[54],"track":[55],"counts":[56],"which":[57],"were":[58],"an":[59,75,104],"average":[60,76],"27%":[62],"lower":[63],"than":[64,81],"those":[65],"previous":[68,83],"TimberWolfSC":[69],"router.":[71],"30":[78],"times":[79],"faster":[80],"algorithm.":[84],"has":[86],"been":[87],"generalized":[88],"to":[89],"handle":[90],"macro":[91],"blocks":[92],"chip,":[95],"equivalent":[96],"sets":[97],"pins,":[99],"single":[100],"pins":[101],"(those":[102],"without":[103],"equivalent),":[105],"having":[108],"many":[109],"or":[110],"no":[111],"built-into-the-cell":[112],"feeds.":[113],"Indiscriminate":[114],"over-the-cell":[115],"also":[118],"handled.>":[119]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-06-24T00:00:00"}