{"id":"https://openalex.org/W1513434770","doi":"https://doi.org/10.1109/iccad.1988.122481","title":"CLAY: a malleable-cell multi-cell transistor matrix approach for CMOS LAYout synthesis","display_name":"CLAY: a malleable-cell multi-cell transistor matrix approach for CMOS LAYout synthesis","publication_year":2003,"publication_date":"2003-01-06","ids":{"openalex":"https://openalex.org/W1513434770","doi":"https://doi.org/10.1109/iccad.1988.122481","mag":"1513434770"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.1988.122481","doi":"https://doi.org/10.1109/iccad.1988.122481","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.1988.122481","pdf_url":null,"source":{"id":"https://openalex.org/S4306419226","display_name":"International Conference on Computer Aided Design","issn_l":"1933-7760","issn":["1933-7760"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052353539","display_name":"P.W. Kollaritsch","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Kollaritsch","raw_affiliation_strings":["Texas Instrumenits, Inc., Dallas, TX, USA","**Texas Instruments, Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas Instrumenits, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"**Texas Instruments, Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002609210","display_name":"S.L. Lusky","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Lusky","raw_affiliation_strings":["Texas Instrumenits, Inc., Dallas, TX, USA","**Texas Instruments, Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas Instrumenits, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"**Texas Instruments, Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040339521","display_name":"Sharat C. Prasad","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Prasad","raw_affiliation_strings":["Texas Instrumenits, Inc., Dallas, TX, USA","**Texas Instruments, Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas Instrumenits, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"**Texas Instruments, Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059367653","display_name":"N. H. Potter","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N. Potter","raw_affiliation_strings":["Texas Instrumenits, Inc., Dallas, TX, USA","**Texas Instruments, Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas Instrumenits, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"**Texas Instruments, Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I74760111"],"apc_list":null,"apc_paid":null,"fwci":0.4485,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.51823284,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"142","last_page":"145"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.00019999999494757503,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplanning","display_name":"floorplanning","score":0.7120000123977661},{"id":"https://openalex.org/keywords/circuit-partitioning","display_name":"circuit partitioning","score":0.8100000023841858},{"id":"https://openalex.org/keywords/mask-generation","display_name":"mask generation","score":0.5789999961853027},{"id":"https://openalex.org/keywords/vlsi-design-automation","display_name":"VLSI design automation","score":0.675000011920929}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.798447847366333},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.599285900592804},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5887106657028198},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5785691142082214},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5503659248352051},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.5024971961975098},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.4778042435646057},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.443101704120636},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.259853720664978},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.238121896982193},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20641857385635376},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17325270175933838},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15155497193336487},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12531927227973938},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.07951277494430542},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.1988.122481","doi":"https://doi.org/10.1109/iccad.1988.122481","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.1988.122481","pdf_url":null,"source":{"id":"https://openalex.org/S4306419226","display_name":"International Conference on Computer Aided Design","issn_l":"1933-7760","issn":["1933-7760"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1967956763","https://openalex.org/W1968346880","https://openalex.org/W2030284531","https://openalex.org/W2064086982","https://openalex.org/W2097774291","https://openalex.org/W2131252726","https://openalex.org/W3216591548"],"related_works":["https://openalex.org/W2410408477","https://openalex.org/W1874615809","https://openalex.org/W2109747475","https://openalex.org/W2298771034","https://openalex.org/W174918046","https://openalex.org/W2102471975","https://openalex.org/W7099380292","https://openalex.org/W4298412709","https://openalex.org/W2137174619","https://openalex.org/W3144320187"],"abstract_inverted_index":{"CLAY":[0,32,58],"takes":[1],"a":[2,10],"netlist":[3],"partitioned":[4],"down":[5],"to":[6,28,34],"the":[7,41,51],"transistor":[8,42],"level,":[9],"technology":[11],"file":[12],"with":[13,61],"an":[14],"arbitrary":[15],"number":[16],"of":[17],"metal":[18],"layers,":[19],"and":[20,24,49,64],"constraints":[21],"on":[22],"aspect":[23],"I/O":[25],"signal":[26],"positions":[27],"produce":[29],"mask":[30],"geometries.":[31],"attempts":[33],"capture,":[35],"in":[36],"software,":[37],"layout":[38],"knowledge":[39],"at":[40,50],"level":[43,53],"(allowing":[44],"variable-shaped":[45],"cells":[46],"including":[47],"heights)":[48],"floorplan":[52],"for":[54],"VLSI":[55],"sized":[56],"examples.":[57],"compares":[59],"well":[60],"standard":[62],"cell":[63],"manual":[65],"approaches.>":[66]},"counts_by_year":[],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-06-24T00:00:00"}
