{"id":"https://openalex.org/A5125036040","orcid":"https://orcid.org/0000-0002-5750-6964","observed_orcids":["https://orcid.org/0000-0002-5750-6964"],"display_name":"Yihui Ren","raw_author_names":["Ren, Yihui","Yihui Ren"],"full_name":"Ren, Yihui","works_count":3,"cited_by_count":8,"summary_stats":{"2yr_mean_citedness":2.6666666666666665,"h_index":1,"i10_index":0},"ids":{"openalex":"https://openalex.org/A5125036040","orcid":"https://orcid.org/0000-0002-5750-6964","observed_orcids":["https://orcid.org/0000-0002-5750-6964"]},"affiliations":[{"institution":{"id":"https://openalex.org/I200870766","ror":"https://ror.org/02ex6cf31","display_name":"Brookhaven National Laboratory","country_code":"US","type":"facility","lineage":["https://openalex.org/I1330989302","https://openalex.org/I200870766","https://openalex.org/I39565521","https://openalex.org/I4210142672"]},"years":[2026]}],"last_known_institutions":[{"id":"https://openalex.org/I200870766","ror":"https://ror.org/02ex6cf31","display_name":"Brookhaven National Laboratory","country_code":"US","type":"facility","lineage":["https://openalex.org/I1330989302","https://openalex.org/I200870766","https://openalex.org/I39565521","https://openalex.org/I4210142672"]}],"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":2,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","count":2,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":2,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","count":1,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","count":1,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":1.01e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","value":7.8e-06,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":7.1e-06,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","value":6.5e-06,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","value":2.4e-06,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.7958999872207642},{"id":"185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","score":0.5922999978065491},{"id":"120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","score":0.4871000051498413},{"id":"113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","score":0.42089998722076416},{"id":"64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","score":0.3659999966621399}],"counts_by_year":[{"year":2025,"works_count":0,"oa_works_count":0,"cited_by_count":1},{"year":2026,"works_count":3,"oa_works_count":3,"cited_by_count":7}],"display_name_alternatives":["Ren, Yihui","Yihui Ren"],"block_key":"y ren","works_api_url":"https://api.openalex.org/works?filter=author.id:A5125036040","updated_date":"2026-11-07T12:08:38","created_date":"2026-02-06T00:00:00"}