{"id":"https://openalex.org/A5114064523","orcid":null,"observed_orcids":[],"display_name":"Anubhav Anand","raw_author_names":["Anand Anubhav","Anubhav Anand"],"full_name":"Anubhav Anand","works_count":4,"cited_by_count":7,"summary_stats":{"2yr_mean_citedness":0.0,"h_index":1,"i10_index":0},"ids":{"openalex":"https://openalex.org/A5114064523","orcid":null,"observed_orcids":[]},"affiliations":[{"institution":{"id":"https://openalex.org/I144614875","ror":"https://ror.org/03f4gsr42","display_name":"Alliance University","country_code":"IN","type":"education","lineage":["https://openalex.org/I144614875"]},"years":[2024,2023]}],"last_known_institutions":[{"id":"https://openalex.org/I144614875","ror":"https://ror.org/03f4gsr42","display_name":"Alliance University","country_code":"IN","type":"education","lineage":["https://openalex.org/I144614875"]}],"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":4,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":3,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","count":3,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","count":1,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","count":1,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","value":0.0001992,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":1.51e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":1.41e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","value":1.3e-05,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","value":2.4e-06,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","score":0.8852359056472778},{"id":"94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","score":0.6522500514984131},{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.5739923119544983},{"id":"116206932","wikidata":"https://www.wikidata.org/wiki/Q7454686","display_name":"Serial binary adder","score":0.5628242492675781},{"id":"33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","score":0.3256187438964844}],"counts_by_year":[{"year":2023,"works_count":2,"oa_works_count":1,"cited_by_count":0},{"year":2024,"works_count":2,"oa_works_count":0,"cited_by_count":1},{"year":2025,"works_count":0,"oa_works_count":0,"cited_by_count":3},{"year":2026,"works_count":0,"oa_works_count":0,"cited_by_count":3}],"display_name_alternatives":["Anand Anubhav","Anubhav Anand"],"block_key":"a anand","works_api_url":"https://api.openalex.org/works?filter=author.id:A5114064523","awards_count":0,"updated_date":"2026-11-07T12:08:38","created_date":"2023-04-08T00:00:00"}