{"id":"https://openalex.org/A5113615098","orcid":null,"observed_orcids":[],"display_name":"R. Yung","raw_author_names":["R. Yung"],"full_name":"Robin Tan Teck Yung","works_count":7,"cited_by_count":157,"summary_stats":{"2yr_mean_citedness":0.0,"h_index":4,"i10_index":4},"ids":{"openalex":"https://openalex.org/A5113615098","orcid":null,"observed_orcids":[]},"affiliations":[{"institution":{"id":"https://openalex.org/I1343180700","ror":"https://ror.org/01ek73717","display_name":"Intel (United States)","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},"years":[2002,1999]},{"institution":{"id":"https://openalex.org/I95457486","ror":"https://ror.org/01an7q238","display_name":"University of California, Berkeley","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]},"years":[2003]}],"last_known_institutions":[{"id":"https://openalex.org/I95457486","ror":"https://ror.org/01an7q238","display_name":"University of California, Berkeley","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","count":6,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":6,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","count":3,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","count":2,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10126","display_name":"Logic, programming, and type systems","count":1,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":2.12e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","value":1.57e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","value":1.31e-05,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","value":1.07e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","value":9.7e-06,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.8693080544471741},{"id":"173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","score":0.5454259514808655},{"id":"118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","score":0.5333729982376099},{"id":"111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","score":0.5017108917236328},{"id":"149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","score":0.3733792304992676}],"counts_by_year":[{"year":1999,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2002,"works_count":4,"oa_works_count":0,"cited_by_count":0},{"year":2003,"works_count":2,"oa_works_count":0,"cited_by_count":0},{"year":2012,"works_count":0,"oa_works_count":0,"cited_by_count":1},{"year":2014,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2015,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2016,"works_count":0,"oa_works_count":0,"cited_by_count":1},{"year":2017,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2018,"works_count":0,"oa_works_count":0,"cited_by_count":1},{"year":2019,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2020,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2022,"works_count":0,"oa_works_count":0,"cited_by_count":3},{"year":2023,"works_count":0,"oa_works_count":0,"cited_by_count":2},{"year":2024,"works_count":0,"oa_works_count":0,"cited_by_count":2}],"display_name_alternatives":["R. Yung"],"block_key":"r yung","works_api_url":"https://api.openalex.org/works?filter=author.id:A5113615098","awards_count":0,"updated_date":"2026-11-04T11:47:51","created_date":"2016-06-24T00:00:00"}
