{"id":"https://openalex.org/A5111994199","orcid":null,"observed_orcids":[],"display_name":"Karthik Gururaj","raw_author_names":["K. Gururaj","Karthik Gururaj"],"full_name":"Karthik Gururaj","works_count":28,"cited_by_count":675,"summary_stats":{"2yr_mean_citedness":0.0,"h_index":14,"i10_index":16},"ids":{"openalex":"https://openalex.org/A5111994199","orcid":null,"observed_orcids":[]},"affiliations":[{"institution":{"id":"https://openalex.org/I1343180700","ror":"https://ror.org/01ek73717","display_name":"Intel (United States)","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},"years":[2019]},{"institution":{"id":"https://openalex.org/I161318765","ror":"https://ror.org/046rm7j60","display_name":"University of California, Los Angeles","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]},"years":[2014,2013,2012,2011,2010,2009,2008]},{"institution":{"id":"https://openalex.org/I24676775","ror":"https://ror.org/03v0r5n49","display_name":"Indian Institute of Technology Madras","country_code":"IN","type":"education","lineage":["https://openalex.org/I24676775"]},"years":[2007]},{"institution":{"id":"https://openalex.org/I2803209242","ror":"https://ror.org/00pjdza24","display_name":"University of California System","country_code":"US","type":"education","lineage":["https://openalex.org/I2803209242"]},"years":[2009]}],"last_known_institutions":[{"id":"https://openalex.org/I1343180700","ror":"https://ror.org/01ek73717","display_name":"Intel (United States)","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","count":20,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","count":16,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","count":15,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":8,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","count":4,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","value":7.53e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","value":6.43e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","value":3.12e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","value":2.85e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":2.81e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.8782336115837097},{"id":"42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","score":0.8609973192214966},{"id":"173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","score":0.7525084018707275},{"id":"118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","score":0.6218589544296265},{"id":"149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","score":0.6179911494255066}],"counts_by_year":[{"year":2007,"works_count":2,"oa_works_count":0,"cited_by_count":0},{"year":2008,"works_count":2,"oa_works_count":0,"cited_by_count":0},{"year":2009,"works_count":8,"oa_works_count":0,"cited_by_count":0},{"year":2010,"works_count":1,"oa_works_count":0,"cited_by_count":0},{"year":2011,"works_count":4,"oa_works_count":0,"cited_by_count":0},{"year":2012,"works_count":1,"oa_works_count":1,"cited_by_count":52},{"year":2013,"works_count":3,"oa_works_count":1,"cited_by_count":66},{"year":2014,"works_count":1,"oa_works_count":0,"cited_by_count":60},{"year":2015,"works_count":0,"oa_works_count":0,"cited_by_count":74},{"year":2016,"works_count":0,"oa_works_count":0,"cited_by_count":86},{"year":2017,"works_count":0,"oa_works_count":0,"cited_by_count":57},{"year":2018,"works_count":0,"oa_works_count":0,"cited_by_count":32},{"year":2019,"works_count":1,"oa_works_count":0,"cited_by_count":24},{"year":2020,"works_count":0,"oa_works_count":0,"cited_by_count":22},{"year":2021,"works_count":0,"oa_works_count":0,"cited_by_count":29},{"year":2022,"works_count":0,"oa_works_count":0,"cited_by_count":19},{"year":2023,"works_count":0,"oa_works_count":0,"cited_by_count":35},{"year":2024,"works_count":0,"oa_works_count":0,"cited_by_count":23},{"year":2025,"works_count":0,"oa_works_count":0,"cited_by_count":11},{"year":2026,"works_count":0,"oa_works_count":0,"cited_by_count":8}],"display_name_alternatives":["K. Gururaj","Karthik Gururaj"],"block_key":"k gururaj","works_api_url":"https://api.openalex.org/works?filter=author.id:A5111994199","awards_count":0,"awards_api_url":"https://api.openalex.org/awards?filter=investigators.author.id:A5111994199","updated_date":"2026-11-12T13:17:38","created_date":"2016-06-24T00:00:00"}