{"id":"https://openalex.org/A5111290194","orcid":"https://orcid.org/0009-0005-9804-8073","observed_orcids":["https://orcid.org/0009-0005-9804-8073"],"display_name":"Anying Jiang","raw_author_names":["Anying Jiang"],"full_name":"Jiang, Anying","works_count":8,"cited_by_count":9,"summary_stats":{"2yr_mean_citedness":1.125,"h_index":1,"i10_index":0},"ids":{"openalex":"https://openalex.org/A5111290194","orcid":"https://orcid.org/0009-0005-9804-8073","observed_orcids":["https://orcid.org/0009-0005-9804-8073"]},"affiliations":[{"institution":{"id":"https://openalex.org/I881766915","ror":"https://ror.org/01rxvg760","display_name":"Nanjing University","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]},"years":[2026,2025,2024]}],"last_known_institutions":[{"id":"https://openalex.org/I881766915","ror":"https://ror.org/01rxvg760","display_name":"Nanjing University","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","count":8,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","count":5,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","count":5,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","count":1,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","count":1,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"topic_share":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","value":3.09e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","value":2.83e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","value":1.64e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","value":1.22e-05,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","value":1.09e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"x_concepts":[{"id":"41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","score":0.7207412123680115},{"id":"24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","score":0.4244341254234314},{"id":"119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","score":0.3952711820602417},{"id":"99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","score":0.31189998984336853},{"id":"127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","score":0.2962000072002411}],"counts_by_year":[{"year":2024,"works_count":2,"oa_works_count":0,"cited_by_count":8},{"year":2025,"works_count":2,"oa_works_count":0,"cited_by_count":1},{"year":2026,"works_count":4,"oa_works_count":1,"cited_by_count":0}],"display_name_alternatives":["Anying Jiang"],"block_key":"a jiang","works_api_url":"https://api.openalex.org/works?filter=author.id:A5111290194","updated_date":"2026-10-10T12:59:14","created_date":"2025-10-10T00:00:00"}
